Displaying 3 results from an estimated 3 matches for "curmbb".
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2008 Sep 19
2
[LLVMdev] Disappearing Machine Basic Blocks (for new instruction)
I have a new instruction that takes 2 labels, and in SelectionDAGISel,
I have it doing "CurMBB->addSuccessor()" for both machine blocks. The
DAG node it creates also takes both blocks as SDOperands.
When I lower to x86, the not-fallthrough block disappears. If I run
llc with --fast, the blocks stay around, so it must be an optimization
pass of some sort that doesn't realize my n...
2008 Sep 20
0
[LLVMdev] Disappearing Machine Basic Blocks (for new instruction)
...e more information. To start, please figure out which pass
deleted the block, what does the machine function looks like before
and after.
Evan
On Sep 19, 2008, at 4:14 PM, Edward Lee wrote:
> I have a new instruction that takes 2 labels, and in SelectionDAGISel,
> I have it doing "CurMBB->addSuccessor()" for both machine blocks. The
> DAG node it creates also takes both blocks as SDOperands.
>
> When I lower to x86, the not-fallthrough block disappears. If I run
> llc with --fast, the blocks stay around, so it must be an optimization
> pass of some sort that...
2006 Dec 19
3
[LLVMdev] alias-aware scheduling
...e());
+ PendingLoads = IndependentMemOps;
+ DAG.setRoot(Root);
+ return Root;
+ }
+
SDOperand CopyValueToVirtualRegister(Value *V, unsigned Reg);
void visit(Instruction &I) { visit(I.getOpcode(), I); }
@@ -470,9 +614,13 @@
void setCurrentBasicBlock(MachineBasicBlock *MBB) { CurMBB = MBB; }
SDOperand getLoadFrom(const Type *Ty, SDOperand Ptr,
- const Value *SV, SDOperand Root,
+ const Value *PtrV, int Offset,
bool isVolatile);
+ void getStoreTo(SDOperand Src, const Value *SrcV,
+ S...