search for: cssdev_attr_groups

Displaying 20 results from an estimated 21 matches for "cssdev_attr_groups".

2019 Jun 03
2
[PATCH v3 2/8] s390/cio: introduce DMA pools to cio
...dma_mask = &sch->dev.coherent_dma_mask; > >> return sch; > >> > >> err: > >> @@ -899,6 +903,8 @@ static int __init setup_css(int nr) > >> dev_set_name(&css->device, "css%x", nr); > >> css->device.groups = cssdev_attr_groups; > >> css->device.release = channel_subsystem_release; > > > > ...and 64 bit here. > > and here. /* * We currently allocate notifier bits with this (using css->device * as the device argument with the DMA API), and are fine with 64 bit * addresses. */...
2019 Jun 03
2
[PATCH v3 2/8] s390/cio: introduce DMA pools to cio
...dma_mask = &sch->dev.coherent_dma_mask; > >> return sch; > >> > >> err: > >> @@ -899,6 +903,8 @@ static int __init setup_css(int nr) > >> dev_set_name(&css->device, "css%x", nr); > >> css->device.groups = cssdev_attr_groups; > >> css->device.release = channel_subsystem_release; > > > > ...and 64 bit here. > > and here. /* * We currently allocate notifier bits with this (using css->device * as the device argument with the DMA API), and are fine with 64 bit * addresses. */...
2019 Apr 09
0
[RFC PATCH 04/12] s390/cio: introduce cio DMA pool
...gt; > #include <linux/suspend.h> > #include <linux/proc_fs.h> > +#include <linux/genalloc.h> > +#include <linux/dma-mapping.h> > #include <asm/isc.h> > #include <asm/crw.h> > > @@ -886,6 +888,8 @@ static const struct attribute_group *cssdev_attr_groups[] = { > NULL, > }; > > +static u64 css_dev_dma_mask = DMA_BIT_MASK(31); > + > static int __init setup_css(int nr) > { > struct channel_subsystem *css; > @@ -899,6 +903,9 @@ static int __init setup_css(int nr) > dev_set_name(&css->device, "css%x&q...
2019 Apr 09
0
[RFC PATCH 04/12] s390/cio: introduce cio DMA pool
...x.ibm.com> wrote: > On Tue, 9 Apr 2019 12:44:58 +0200 > Cornelia Huck <cohuck at redhat.com> wrote: > > > On Fri, 5 Apr 2019 01:16:14 +0200 > > Halil Pasic <pasic at linux.ibm.com> wrote: > > > @@ -886,6 +888,8 @@ static const struct attribute_group *cssdev_attr_groups[] = { > > > NULL, > > > }; > > > > > > +static u64 css_dev_dma_mask = DMA_BIT_MASK(31); > > > + > > > static int __init setup_css(int nr) > > > { > > > struct channel_subsystem *css; > > > @@ -899,6 +903,9 @@...
2019 Jun 03
5
[PATCH v3 2/8] s390/cio: introduce DMA pools to cio
...v.coherent_dma_mask = DMA_BIT_MASK(31); > + sch->dev.dma_mask = &sch->dev.coherent_dma_mask; > return sch; > > err: > @@ -899,6 +903,8 @@ static int __init setup_css(int nr) > dev_set_name(&css->device, "css%x", nr); > css->device.groups = cssdev_attr_groups; > css->device.release = channel_subsystem_release; ...and 64 bit here. > + css->device.coherent_dma_mask = DMA_BIT_MASK(64); > + css->device.dma_mask = &css->device.coherent_dma_mask; > > mutex_init(&css->mutex); > css->cssid = chsc_get_cssid(n...
2019 Jun 03
5
[PATCH v3 2/8] s390/cio: introduce DMA pools to cio
...v.coherent_dma_mask = DMA_BIT_MASK(31); > + sch->dev.dma_mask = &sch->dev.coherent_dma_mask; > return sch; > > err: > @@ -899,6 +903,8 @@ static int __init setup_css(int nr) > dev_set_name(&css->device, "css%x", nr); > css->device.groups = cssdev_attr_groups; > css->device.release = channel_subsystem_release; ...and 64 bit here. > + css->device.coherent_dma_mask = DMA_BIT_MASK(64); > + css->device.dma_mask = &css->device.coherent_dma_mask; > > mutex_init(&css->mutex); > css->cssid = chsc_get_cssid(n...
2019 Jun 03
0
[PATCH v3 2/8] s390/cio: introduce DMA pools to cio
...herent_dma_mask; > > >> return sch; > > >> > > >> err: > > >> @@ -899,6 +903,8 @@ static int __init setup_css(int nr) > > >> dev_set_name(&css->device, "css%x", nr); > > >> css->device.groups = cssdev_attr_groups; > > >> css->device.release = channel_subsystem_release; > > > > > > ...and 64 bit here. > > > > and here. > > /* > * We currently allocate notifier bits with this (using css->device > * as the device argument with the DM...
2019 Jun 03
0
[PATCH v3 2/8] s390/cio: introduce DMA pools to cio
...K(31); >> + sch->dev.dma_mask = &sch->dev.coherent_dma_mask; >> return sch; >> >> err: >> @@ -899,6 +903,8 @@ static int __init setup_css(int nr) >> dev_set_name(&css->device, "css%x", nr); >> css->device.groups = cssdev_attr_groups; >> css->device.release = channel_subsystem_release; > > ...and 64 bit here. and here. > >> + css->device.coherent_dma_mask = DMA_BIT_MASK(64); >> + css->device.dma_mask = &css->device.coherent_dma_mask; >> >> mutex_init(&css-&...
2019 May 23
0
[PATCH v2 2/8] s390/cio: introduce DMA pools to cio
...ize(&sch->dev); + sch->dev.coherent_dma_mask = DMA_BIT_MASK(31); + sch->dev.dma_mask = &sch->dev.coherent_dma_mask; return sch; err: @@ -899,6 +903,8 @@ static int __init setup_css(int nr) dev_set_name(&css->device, "css%x", nr); css->device.groups = cssdev_attr_groups; css->device.release = channel_subsystem_release; + css->device.coherent_dma_mask = DMA_BIT_MASK(64); + css->device.dma_mask = &css->device.coherent_dma_mask; mutex_init(&css->mutex); css->cssid = chsc_get_cssid(nr); @@ -1018,6 +1024,109 @@ static struct notifier_b...
2019 Apr 26
0
[PATCH 05/10] s390/cio: introduce DMA pools to cio
...ch->dma_mask = css_dev_dma_mask; + sch->dev.dma_mask = &sch->dma_mask; + sch->dev.coherent_dma_mask = sch->dma_mask; return sch; err: @@ -899,6 +906,9 @@ static int __init setup_css(int nr) dev_set_name(&css->device, "css%x", nr); css->device.groups = cssdev_attr_groups; css->device.release = channel_subsystem_release; + /* some cio DMA memory needs to be 31 bit addressable */ + css->device.coherent_dma_mask = css_dev_dma_mask, + css->device.dma_mask = &css_dev_dma_mask; mutex_init(&css->mutex); css->cssid = chsc_get_cssid(nr); @@ -1...
2019 May 29
0
[PATCH v3 2/8] s390/cio: introduce DMA pools to cio
...ize(&sch->dev); + sch->dev.coherent_dma_mask = DMA_BIT_MASK(31); + sch->dev.dma_mask = &sch->dev.coherent_dma_mask; return sch; err: @@ -899,6 +903,8 @@ static int __init setup_css(int nr) dev_set_name(&css->device, "css%x", nr); css->device.groups = cssdev_attr_groups; css->device.release = channel_subsystem_release; + css->device.coherent_dma_mask = DMA_BIT_MASK(64); + css->device.dma_mask = &css->device.coherent_dma_mask; mutex_init(&css->mutex); css->cssid = chsc_get_cssid(nr); @@ -1018,6 +1024,109 @@ static struct notifier_b...
2019 Jun 06
0
[PATCH v4 2/8] s390/cio: introduce DMA pools to cio
...dth (e.g. ccw). + */ + sch->dev.coherent_dma_mask = DMA_BIT_MASK(31); + sch->dev.dma_mask = &sch->dev.coherent_dma_mask; return sch; err: @@ -899,6 +907,13 @@ static int __init setup_css(int nr) dev_set_name(&css->device, "css%x", nr); css->device.groups = cssdev_attr_groups; css->device.release = channel_subsystem_release; + /* + * We currently allocate notifier bits with this (using + * css->device as the device argument with the DMA API) + * and are fine with 64 bit addresses. + */ + css->device.coherent_dma_mask = DMA_BIT_MASK(64); + css->device.d...
2019 Jun 12
0
[PATCH v5 2/8] s390/cio: introduce DMA pools to cio
...dth (e.g. ccw). + */ + sch->dev.coherent_dma_mask = DMA_BIT_MASK(31); + sch->dev.dma_mask = &sch->dev.coherent_dma_mask; return sch; err: @@ -899,6 +907,13 @@ static int __init setup_css(int nr) dev_set_name(&css->device, "css%x", nr); css->device.groups = cssdev_attr_groups; css->device.release = channel_subsystem_release; + /* + * We currently allocate notifier bits with this (using + * css->device as the device argument with the DMA API) + * and are fine with 64 bit addresses. + */ + css->device.coherent_dma_mask = DMA_BIT_MASK(64); + css->device.d...
2019 May 29
16
[PATCH v3 0/8] s390: virtio: support protected virtualization
Enhanced virtualization protection technology may require the use of bounce buffers for I/O. While support for this was built into the virtio core, virtio-ccw wasn't changed accordingly. Some background on technology (not part of this series) and the terminology used. * Protected Virtualization (PV): Protected Virtualization guarantees, that non-shared memory of a guest that operates in PV
2019 Jun 12
21
[PATCH v5 0/8] s390: virtio: support protected virtualization
Enhanced virtualization protection technology may require the use of bounce buffers for I/O. While support for this was built into the virtio core, virtio-ccw wasn't changed accordingly. Some background on technology (not part of this series) and the terminology used. * Protected Virtualization (PV): Protected Virtualization guarantees, that non-shared memory of a guest that operates in PV
2019 Jun 12
21
[PATCH v5 0/8] s390: virtio: support protected virtualization
Enhanced virtualization protection technology may require the use of bounce buffers for I/O. While support for this was built into the virtio core, virtio-ccw wasn't changed accordingly. Some background on technology (not part of this series) and the terminology used. * Protected Virtualization (PV): Protected Virtualization guarantees, that non-shared memory of a guest that operates in PV
2019 Jun 06
15
[PATCH v4 0/8] s390: virtio: support protected virtualization
Enhanced virtualization protection technology may require the use of bounce buffers for I/O. While support for this was built into the virtio core, virtio-ccw wasn't changed accordingly. Some background on technology (not part of this series) and the terminology used. * Protected Virtualization (PV): Protected Virtualization guarantees, that non-shared memory of a guest that operates in PV
2019 Jun 06
15
[PATCH v4 0/8] s390: virtio: support protected virtualization
Enhanced virtualization protection technology may require the use of bounce buffers for I/O. While support for this was built into the virtio core, virtio-ccw wasn't changed accordingly. Some background on technology (not part of this series) and the terminology used. * Protected Virtualization (PV): Protected Virtualization guarantees, that non-shared memory of a guest that operates in PV
2019 May 23
18
[PATCH v2 0/8] s390: virtio: support protected virtualization
Enhanced virtualization protection technology may require the use of bounce buffers for I/O. While support for this was built into the virtio core, virtio-ccw wasn't changed accordingly. Some background on technology (not part of this series) and the terminology used. * Protected Virtualization (PV): Protected Virtualization guarantees, that non-shared memory of a guest that operates in PV
2019 Apr 26
33
[PATCH 00/10] s390: virtio: support protected virtualization
Enhanced virtualization protection technology may require the use of bounce buffers for I/O. While support for this was built into the virtio core, virtio-ccw wasn't changed accordingly. Some background on technology (not part of this series) and the terminology used. * Protected Virtualization (PV): Protected Virtualization guarantees, that non-shared memory of a guest that operates in PV