Displaying 5 results from an estimated 5 matches for "crossclassjoin".
2008 Sep 24
2
[LLVMdev] Multi-Instruction Patterns
...nt to reuse the same register.
Perhaps the answer is to add vector extract support to the coalescer, in
the same way you added subregister support. I don't understand the nitty
gritty of that, though.
> That leaves us with #1. I have added support to coalesce cross-class
> copies (see CrossClassJoin in SimpleRegisterCoalescing.cpp).
Yep.
> Unfortunately, it breaks a few tests and I haven't had the time to
> look into them. If that's done, we just need to add the concept of
> "compatible register classes" and mark MOVPS2SSrr as a copy and *it
> should just work*....
2008 Sep 24
0
[LLVMdev] Multi-Instruction Patterns
...egister support. I don't understand the
> nitty
> gritty of that, though.
I don't think that's a good idea. Conceptually vector_extract is very
different from a move.
>
>
>> That leaves us with #1. I have added support to coalesce cross-class
>> copies (see CrossClassJoin in SimpleRegisterCoalescing.cpp).
>
> Yep.
As Dan pointed out, #2 is also a workable solution.
>
>> Unfortunately, it breaks a few tests and I haven't had the time to
>> look into them. If that's done, we just need to add the concept of
>> "compatible regis...
2008 Sep 24
0
[LLVMdev] Multi-Instruction Patterns
...alescer can eliminate.
#2 is conceptually correct. The problem is 128 bit XMM0 is the same
register as 32 bit (or 64 bit) XMM0. So it's not possible to define
the super-register / sub-register relationship.
That leaves us with #1. I have added support to coalesce cross-class
copies (see CrossClassJoin in SimpleRegisterCoalescing.cpp).
Unfortunately, it breaks a few tests and I haven't had the time to
look into them. If that's done, we just need to add the concept of
"compatible register classes" and mark MOVPS2SSrr as a copy and *it
should just work*.
Evan
>
>
&...
2008 Sep 24
2
[LLVMdev] Multi-Instruction Patterns
Chris Lattner wrote:
> On Sep 23, 2008, at 11:26 AM, David Greene wrote:
>
>> Are there any examples of using tablegen to generate multiple machine
>> instructions from a single pattern? Or do these cases always have
>> to be
>> manually expanded?
>
> PPC has a bunch of examples, for example:
>
> // Arbitrary immediate support. Implement in terms of
2008 Sep 24
1
[LLVMdev] Multi-Instruction Patterns
...stand the
> > nitty
> > gritty of that, though.
>
> I don't think that's a good idea. Conceptually vector_extract is very
> different from a move.
Ok, I agree.
> >> That leaves us with #1. I have added support to coalesce cross-class
> >> copies (see CrossClassJoin in SimpleRegisterCoalescing.cpp).
> >
> > Yep.
>
> As Dan pointed out, #2 is also a workable solution.
Yes, I like Dan's proposal.
> > What about getting tblgen support for the pattern in the .td file?
> > That would
> > be another way to tackle this and wo...