search for: createmcsubtargetinfo

...ldering. Kind regards, Aidan Steele int main (int argc, const char *argv[]) { LLVMInitializeARMTargetInfo(); LLVMInitializeARMTargetMC(); LLVMInitializeARMAsmParser(); LLVMInitializeARMDisassembler(); const llvm::Target Target; llvm::OwningPtr<const llvm::MCSubtargetInfo> STI(Target.createMCSubtargetInfo("", "", "")); llvm::OwningPtr<const llvm::MCDisassembler> disassembler(Target.createMCDisassembler(*STI)); llvm::OwningPtr<llvm::MemoryBuffer> Buffer; llvm::MemoryBuffer::getFile(llvm::StringRef("/path/to/file.bin"), Buffer); llvm::MCInst Ins...

...ldering. Kind regards, Aidan Steele int main (int argc, const char *argv[]) { LLVMInitializeARMTargetInfo(); LLVMInitializeARMTargetMC(); LLVMInitializeARMAsmParser(); LLVMInitializeARMDisassembler(); const llvm::Target Target; llvm::OwningPtr<const llvm::MCSubtargetInfo> STI(Target.createMCSubtargetInfo("", "", "")); llvm::OwningPtr<const llvm::MCDisassembler> disassembler(Target.createMCDisassembler(*STI)); llvm::OwningPtr<llvm::MemoryBuffer> Buffer; llvm::MemoryBuffer::getFile(llvm::StringRef("/path/to/file.bin"), Buffer); llvm::MCInst Ins...

...from the object*. Some of the tools that call createMCAsmInfo() link multiple object files (e.g. llvm-rtdyld, and llvm-dwp) and may therefore need to implement the ABI inter-linking rules. Looking beyond enabling IAS for N64 towards fixing N32 support for IAS, the same requirements would apply to createMCSubtargetInfo(), createAsmPrinter() (because the Mips, PowerPC, AMDGPU, and WebAssembly targets call createMCSubtargetInfo() in their implementations), createMCCodeEmitter(), and createMCAsmBackend(). IRLinker would also need to handle the incompatibility between the O32 and N32/N64 ABI's IR-level since fron...

On 24 June 2016 at 06:02, Daniel Sanders <Daniel.Sanders at imgtec.com> wrote: > Hi, > > Having recently enabled IAS by default for the MIPS O32 ABI, I'm now trying to do the same thing for the MIPS N64 ABI. Unfortunately, it is not currently possible to enable IAS by default for the N64 ABI without also enabling it for the N32 ABI because this information is not reflected in

...in (int argc, const char *argv[]) > { > LLVMInitializeARMTargetInfo(); > LLVMInitializeARMTargetMC(); > LLVMInitializeARMAsmParser(); > LLVMInitializeARMDisassembler(); > > const llvm::Target Target; > > llvm::OwningPtr<const llvm::MCSubtargetInfo> > STI(Target.createMCSubtargetInfo("", "", "")); > llvm::OwningPtr<const llvm::MCDisassembler> > disassembler(Target.createMCDisassembler(*STI)); > > llvm::OwningPtr<llvm::MemoryBuffer> Buffer; > llvm::MemoryBuffer::getFile(llvm::StringRef("/path/to/file.bin"), Buff...

...OFI; MCContext Ctx(MAI.get(), MRI.get(), &MOFI); MOFI.InitMCObjectFileInfo(TheTriple, llvm::Reloc::Model::PIC_, llvm::CodeModel::Model::Default, Ctx); std::unique_ptr<MCInstrInfo> MCII(TheTarget->createMCInstrInfo()); std::unique_ptr<MCSubtargetInfo> STI(TheTarget->createMCSubtargetInfo(TripleName, MCPU, FeaturesStr)); OK, that seems, OK. Now I want to setup an output buffer: std::string ofile("/home/users/avose/hpcgp/hpcgp_rundir/tmp.o"); std::unique_ptr<tool_output_file> Out = GetOutputStream(ofile); if (!Out) { return 1; } std::unique_ptr<bu...

...> { >> LLVMInitializeARMTargetInfo(); >> LLVMInitializeARMTargetMC(); >> LLVMInitializeARMAsmParser(); >> LLVMInitializeARMDisassembler(); >> >> const llvm::Target Target; >> >> llvm::OwningPtr<const llvm::MCSubtargetInfo> >> STI(Target.createMCSubtargetInfo("", "", "")); >> llvm::OwningPtr<const llvm::MCDisassembler> >> disassembler(Target.createMCDisassembler(*STI)); >> >> llvm::OwningPtr<llvm::MemoryBuffer> Buffer; >> llvm::MemoryBuffer::getFile(llvm::StringRef("/path/to/fi...

...ow to resolve this scheduling class. return 0; } }; ``` Note that this override will become a member of a new tablegen'd class named AArch64GenMCSubtargetInfo. That class would directly extend MCSubtargetInfo. Class AArch64GenMCSubtargetInfo is what will get instantiated by method `Target::createMCSubtargetInfo()`. ---- Let's go back to the definition of IsGPRZero using a TIIPredicate. ``` def IsGPRZero : TIIPredicate<"AArch64", "isGPRZero", AnyOfMCPredicates<[CheckMOVZ, CheckANDW, CheckANDX, CheckCOPY]>>; ``` This is how the InstructionInfoEmitter expands the meth...

...sdata4 but gets sdata8 since it checks for Triple::mips64/mips64el) * PersonalityEncoding and TTypeEncoding are correct but only because we don't have a R_MIPS_PC64 relocation yet. If we had such a relocation this would have the same problem as FDECFEEncoding. * Call createMCInstrInfo * Call createMCSubtargetInfo(Triple, ...) * If emitting assembly: * Call createMCInstPrinter(Triple, ...) * If emitting encodings: * Call createMCCodeEmitter() * Call createMCAsmBackend(..., Triple, ...) * Call createMCAsmStreamer() * If emitting objects: * Call createMCCodeEmitter() * Call createMCAsmBackend...

...sdata4 but gets sdata8 since it checks for Triple::mips64/mips64el) * PersonalityEncoding and TTypeEncoding are correct but only because we don't have a R_MIPS_PC64 relocation yet. If we had such a relocation this would have the same problem as FDECFEEncoding. * Call createMCInstrInfo * Call createMCSubtargetInfo(Triple, ...) * If emitting assembly: * Call createMCInstPrinter(Triple, ...) * If emitting encodings: * Call createMCCodeEmitter() * Call createMCAsmBackend(..., Triple, ...) * Call createMCAsmStreamer() * If emitting objects: * Call createMCCodeEmitter() * Call createMCAsmBackend...

...sdata4 but gets sdata8 since it checks for Triple::mips64/mips64el) * PersonalityEncoding and TTypeEncoding are correct but only because we don't have a R_MIPS_PC64 relocation yet. If we had such a relocation this would have the same problem as FDECFEEncoding. * Call createMCInstrInfo * Call createMCSubtargetInfo(Triple, ...) * If emitting assembly: * Call createMCInstPrinter(Triple, ...) * If emitting encodings: * Call createMCCodeEmitter() * Call createMCAsmBackend(..., Triple, ...) * Call createMCAsmStreamer() * If emitting objects: * Call createMCCodeEmitter() * Call createMCAsmBackend...

Hi, Having recently enabled IAS by default for the MIPS O32 ABI, I'm now trying to do the same thing for the MIPS N64 ABI. Unfortunately, it is not currently possible to enable IAS by default for the N64 ABI without also enabling it for the N32 ABI because this information is not reflected in the triple and that's the only information MipsMCAsmInfo has. This would be fine if it N32 was

...sdata4 but gets sdata8 since it checks for Triple::mips64/mips64el) * PersonalityEncoding and TTypeEncoding are correct but only because we don't have a R_MIPS_PC64 relocation yet. If we had such a relocation this would have the same problem as FDECFEEncoding. * Call createMCInstrInfo * Call createMCSubtargetInfo(Triple, ...) * If emitting assembly: * Call createMCInstPrinter(Triple, ...) * If emitting encodings: * Call createMCCodeEmitter() * Call createMCAsmBackend(..., Triple, ...) * Call createMCAsmStreamer() * If emitting objects: * Call createMCCodeEmitter() * Call createMCAsmBackend...

> OK, I'm going to just reply to the last because I think it's the most important part of all this and would like to try to have us side tracked again. If you'd like I can reply to it, but let's take the last part first :) > > > > Could you please provide some examples of things that are impossible right now > > > with command lines, how those interact with