search for: createmachineinstr

Displaying 12 results from an estimated 12 matches for "createmachineinstr".

2013 Feb 15
2
[LLVMdev] build a machine instruction by itself
...ike to use the function I create in various contexts but just have one base function, that is used to build a proper Addiu Sp, Immediate field. There are various BuildMi forms. To me, creating a MachineInstr is not related this context of how you are placing it. So I guess I could use: /// CreateMachineInstr - Allocate a new MachineInstr. Use this instead /// of `new MachineInstr'. /// MachineInstr *CreateMachineInstr(const MCInstrDesc &MCID, DebugLoc DL, bool NoImp = false); so my creator function needs to at lea...
2013 Feb 16
0
[LLVMdev] build a machine instruction by itself
...ious contexts but just > have one base function, that is used to build a proper Addiu Sp, > Immediate field. There are various BuildMi forms. > > To me, creating a MachineInstr is not related this context of how you > are placing it. > > So I guess I could use: > > /// CreateMachineInstr - Allocate a new MachineInstr. Use this instead > /// of `new MachineInstr'. > /// > MachineInstr *CreateMachineInstr(const MCInstrDesc &MCID, > DebugLoc DL, > bool NoImp = false); > > so m...
2010 Aug 27
2
[LLVMdev] What does this error mean: psuedo instructions should be removed before code emission?
On 08/27/2010 11:32, Yuri wrote: > As I understand only one of TCRETURNri64 and RET should be created. > I have sources of rev.112200. > > Here is the stack when TCRETURNri64 instruction is created: > #1 0x0000000802c8b4e2 in llvm::MachineFunction::CreateMachineInstr > (this=0x30eb000, TID=@0x803a78940, DL={LineCol = 0, ScopeIdx = 0}, > NoImp=false) at /tmp/llvm-svn/llvm/lib/CodeGen/MachineFunction.cpp:153 > #2 0x00000008028ea45b in llvm::BuildMI (BB=@0x4b69378, > I={<std::iterator<std::bidirectional_iterator_tag, llvm::MachineInstr, > lon...
2010 Aug 27
0
[LLVMdev] What does this error mean: psuedo instructions should be removed before code emission?
...> reproduce it. > > It could be his host compiler is miscompiling llvm, too. > As I understand only one of TCRETURNri64 and RET should be created. I have sources of rev.112200. Here is the stack when TCRETURNri64 instruction is created: #1 0x0000000802c8b4e2 in llvm::MachineFunction::CreateMachineInstr (this=0x30eb000, TID=@0x803a78940, DL={LineCol = 0, ScopeIdx = 0}, NoImp=false) at /tmp/llvm-svn/llvm/lib/CodeGen/MachineFunction.cpp:153 #2 0x00000008028ea45b in llvm::BuildMI (BB=@0x4b69378, I={<std::iterator<std::bidirectional_iterator_tag, llvm::MachineInstr, long int, llvm::MachineI...
2013 Feb 15
0
[LLVMdev] build a machine instruction by itself
On Feb 15, 2013, at 1:21 PM, Reed Kotler <rkotler at mips.com> wrote: > I want to have some functions that create machine instructions, not specifying which machine function or basic block or iterator they are part of. All machine instructions must be created by a machine function. It provides the context for memory allocation etc. > And then I want to use that result when adding
2010 Aug 27
3
[LLVMdev] What does this error mean: psuedo instructions should be removed before code emission?
On Aug 27, 2010, at 11:00 AMPDT, Eric Christopher wrote: >>> >>> For some reason I am getting this error even when I only have an >>> empty 'main' function. So I couldn't create .ll file reproducing >>> it and I have to debug myself. >>> >>> The function causing the problem is stub created in >>> JIT::runFunction:
2013 Feb 15
2
[LLVMdev] build a machine instruction by itself
I want to have some functions that create machine instructions, not specifying which machine function or basic block or iterator they are part of. And then I want to use that result when adding that instruction to a basic block. I'm pretty sure you can do this but we have not done this in the Mips port so far. We just use instruction builder. Anyone know how to do this best, or can point
2010 Aug 27
0
[LLVMdev] What does this error mean: psuedo instructions should be removed before code emission?
...i wrote: > On 08/27/2010 11:32, Yuri wrote: >> As I understand only one of TCRETURNri64 and RET should be created. >> I have sources of rev.112200. >> >> Here is the stack when TCRETURNri64 instruction is created: >> #1 0x0000000802c8b4e2 in llvm::MachineFunction::CreateMachineInstr >> (this=0x30eb000, TID=@0x803a78940, DL={LineCol = 0, ScopeIdx = 0}, >> NoImp=false) at /tmp/llvm-svn/llvm/lib/CodeGen/MachineFunction.cpp: >> 153 >> #2 0x00000008028ea45b in llvm::BuildMI (BB=@0x4b69378, >> I={<std::iterator<std::bidirectional_iterator_tag,...
2010 Aug 27
2
[LLVMdev] What does this error mean: psuedo instructions should be removed before code emission?
...a TCRETURN? Sorry, my bad. I have set breakpoints by MI addresses. But it turns out that these addresses were reused and the second MIs created at these particular addressed are of interest, not the first ones. RET creation stack (created first): #1 0x0000000802c8b4e2 in llvm::MachineFunction::CreateMachineInstr (this=0x30eb000, TID=@0x803a99240, DL={LineCol = 0, ScopeIdx = 0}, NoImp=false) at /tmp/llvm-svn/llvm/lib/CodeGen/MachineFunction.cpp:153 #2 0x00000008028ea45b in llvm::BuildMI (BB=@0x4b69378, I={<std::iterator<std::bidirectional_iterator_tag, llvm::MachineInstr, long int, llvm::MachineI...
2010 Oct 15
0
[LLVMdev] [LLVMDev] How do I add a branch to a MachineInstr?
...ion? Do I need to set some key items in the MachineBasicBlock too? Is there more documentation on this subject? MachineBasicBlock * mbb = mf->CreateMachineBasicBlock( 0 ); mbb->getNumber(); TargetInstrDesc tid; tid.Opcode = TID::Branch; tid.NumOperands = 1; MachineInstr * instr = mf->CreateMachineInstr( tid, DebugLoc() ); mbb->insert( mbb->end(), instr ); Thanks, Jeff Kunkel
2013 Jan 14
2
[LLVMdev] Troubleshooting Internal Garbage Collection
...0xb74636a5 7 libc.so.6 0xb7463757 8 llc 0x08180167 9 llc 0x08c32bec llvm::LeakDetector::addGarbageObjectImpl(void*) + 380 10 llc 0x088a8ec5 llvm::MachineInstr::MachineInstr(llvm::MCInstrDesc const&, llvm::DebugLoc, bool) + 245 11 llc 0x08899daf llvm::MachineFunction::CreateMachineInstr(llvm::MCInstrDesc const&, llvm::DebugLoc, bool) + 111 12 llc 0x0871b4a0 llvm::InstrEmitter::EmitMachineNode(llvm::SDNode*, bool, bool, llvm::DenseMap<llvm::SDValue, unsigned int, llvm::DenseMapInfo<llvm::SDValue> >&) + 512 13 llc 0x0866dfbd llvm::ScheduleDAGSDNodes::...
2012 Apr 19
0
[LLVMdev] Target Dependent Hexagon Packetizer patch
...xtender. Trigure an assertion if >> +// reservation fail. >> +void HexagonPacketizerList::reserveResourcesForConstExt(MachineInstr* MI) { >> + const HexagonInstrInfo *QII = (const HexagonInstrInfo *) TII; >> + MachineInstr *PseudoMI = MI->getParent()->getParent()->CreateMachineInstr( >> + QII->get(Hexagon::IMMEXT), MI->getDebugLoc()); >> + >> + if (ResourceTracker->canReserveResources(PseudoMI)) { >> + ResourceTracker->reserveResources(PseudoMI); >> + MI->getParent()->getParent()->Delete...