search for: createmachinebasicblock

...eFunction::iterator It = BB; ++It; // thisMBB: // ... // TrueVal = ... // setcc r1, r2, r3 // bNE r1, r0, copy1MBB // fallthrough --> copy0MBB MachineBasicBlock *thisMBB = BB; MachineFunction *F = BB->getParent(); MachineBasicBlock *copy0MBB = F->CreateMachineBasicBlock(LLVM_BB); MachineBasicBlock *sinkMBB = F->CreateMachineBasicBlock(LLVM_BB); F->insert(It, copy0MBB); F->insert(It, sinkMBB); // Transfer the remainder of BB and its successor edges to sinkMBB. sinkMBB->splice(sinkMBB->begin(), BB, llvm::next(Machin...

...eFunction::iterator It = BB; ++It; // thisMBB: // ... // TrueVal = ... // setcc r1, r2, r3 // bNE r1, r0, copy1MBB // fallthrough --> copy0MBB MachineBasicBlock *thisMBB = BB; MachineFunction *F = BB->getParent(); MachineBasicBlock *copy0MBB = F->CreateMachineBasicBlock(LLVM_BB); MachineBasicBlock *sinkMBB = F->CreateMachineBasicBlock(LLVM_BB); F->insert(It, copy0MBB); F->insert(It, sinkMBB); // Transfer the remainder of BB and its successor edges to sinkMBB. sinkMBB->splice(sinkMBB->begin(), BB, llvm::next(Machin...

...*MBB) const { DebugLoc db = MI->getDebugLoc(); const TargetInstrInfo *TII = getTargetMachine().getInstrInfo(); const BasicBlock *LLVM_BB = MBB->getBasicBlock(); MachineFunction *F = MBB->getParent(); // Create all the basicblocks MachineBasicBlock *MBB_cond = F->CreateMachineBasicBlock(LLVM_BB); MachineBasicBlock *MBB_erase = F->CreateMachineBasicBlock(LLVM_BB); MachineBasicBlock *MBB_end = F->CreateMachineBasicBlock(LLVM_BB); // Insert the new basicblocks F->insert(MBB, MBB_cond); F->insert(MBB, MBB_erase); F->insert(MBB, MBB_end); //...

...achineFunction::iterator It = BB; ++It; - - // thisMBB: - // ... - // TrueVal = ... - // cmpTY ccX, r1, r2 - // bCC copy1MBB - // fallthrough --> copy0MBB - MachineBasicBlock *thisMBB = BB; + MachineFunction *F = BB->getParent(); - MachineBasicBlock *copy0MBB = F->CreateMachineBasicBlock(LLVM_BB); - MachineBasicBlock *sinkMBB = F->CreateMachineBasicBlock(LLVM_BB); - unsigned SelectPred = MI->getOperand(4).getImm(); - BuildMI(BB, TII->get(PPC::BCC)) - .addImm(SelectPred).addReg(MI->getOperand(1).getReg()).addMBB(sinkMBB); - F->insert(It, copy0MBB); - F->ins...

Hi Gary, This does not patch cleanly for me (PPCISelLowering.cpp). Can you prepare a updated patch? Thanks, Evan On Jul 10, 2008, at 11:45 AM, Gary Benson wrote: > Cool, that worked. New patch attached... > > Cheers, > Gary > > Evan Cheng wrote: >> Just cast both values to const TargetRegisterClass*. >> >> Evan >> >> On Jul 10, 2008, at 7:36

...onst { MBB->getParent()->dump(); DebugLoc db = MI->getDebugLoc(); const TargetInstrInfo *TII = getTargetMachine().getInstrInfo(); const BasicBlock *LLVM_BB = MBB->getBasicBlock(); MachineFunction *F = MBB->getParent(); // Create all the basicblocks MachineBasicBlock *MBB_cond = F->CreateMachineBasicBlock(LLVM_BB); MachineBasicBlock *MBB_erase = F->CreateMachineBasicBlock(LLVM_BB); MachineBasicBlock *MBB_end = F->CreateMachineBasicBlock(LLVM_BB); // Insert the new basicblocks F->insert(MBB, MBB_cond); F->insert(MBB, MBB_erase); F->insert(MBB, MBB_end); // Split the last MBB in two MBB...

After discussions last night, I'm leaning towards going legit with all my pseudo expansions in Mips 16. Some I think I can clearly do by just putting in the proper side effects of implicit registers (T8 the condition code register as used by mips 16). But I'm still left with some pseudos that have jmp .+4 type instructions in them. The original Mips port was to Mips I and Mips I,

..., I stole the idea from ARM64BranchRelaxation::splitBlockBeforeInstr.) This is my code : // I would pass call instruction to this function void split_mbb(MachineInstr* mi){ MachineBasicBlock* mbb=mi->getParent(); MachineFunction* mf=mbb->getParent(); MachineBasicBlock* new_mbb=mf->CreateMachineBasicBlock(mbb->getBasicBlock()); MachineFunction::iterator mbb_it(mbb); mf->insert(mbb_it,new_mbb); new_mbb->splice(new_mbb->end(),mbb,mbb->begin(),mi); } Originally, mi is in BB. (mi would be a call instruction) (do not consider mi is a branch instruction) BB --> BB1 , BB2 Then, I...

...oc(); >> const TargetInstrInfo *TII = getTargetMachine().getInstrInfo(); >> const BasicBlock *LLVM_BB = MBB->getBasicBlock(); >> MachineFunction *F = MBB->getParent(); >> >> // Create all the basicblocks >> MachineBasicBlock *MBB_cond = F->CreateMachineBasicBlock(LLVM_BB); >> MachineBasicBlock *MBB_erase = F->CreateMachineBasicBlock(LLVM_BB); >> MachineBasicBlock *MBB_end = F->CreateMachineBasicBlock(LLVM_BB); >> >> // Insert the new basicblocks >> F->insert(MBB, MBB_cond); >> F->insert(MBB, MBB...

...run (specifically, I cannot allow any stack operations). Because of this, I figured a good place to do this code insertion is in EmitPrologue. I also, at this time, create the block that handles the error case. // create a new block for the overflow handling code MF.overflowBlock = MF.CreateMachineBasicBlock(); MachineFunction::iterator obinsert = MF.begin(); MF.addToMBBNumbering(MF.overflowBlock); MF.push_back(MF.overflowBlock); // on overflow jump to a new block to handle overflow BuildMI(MBB, MBBI, DL, TII.get(X86::JAE_4)).addMBB(MF.overflowBlock); //add dummy in...

...basic block is inserted right before I void X86CFIOptPass::insertBasicBlockBefore(MachineFunction &MF, MachineBasicBlock *Pred, MachineFunction::iterator I){ const BasicBlock* LLVM_BB = Pred->getBasicBlock(); MachineBasicBlock * MBB = MF.CreateMachineBasicBlock(LLVM_BB); // create a MBB MBB->setNumber(19880616); // set the number of MBB to be 19880616 which is used as an ID Pred->addSuccessor(MBB); const TargetInstrInfo *TII = MF.getTarget().getInstrInfo(); DebugLoc dl; // CALLpcrel32 abort BuildMI(MBB,dl,TII->get(X86::CALLpc...

Cool, that worked. New patch attached... Cheers, Gary Evan Cheng wrote: > Just cast both values to const TargetRegisterClass*. > > Evan > > On Jul 10, 2008, at 7:36 AM, Gary Benson wrote: > > Evan Cheng wrote: > > > How about? > > > > > > const TargetRegisterClass *RC = is64Bit ? &PPC:GPRCRegClass : > > > &PPC:G8RCRegClass; >

Hi ! I'm trying to modify the code in a machine function pass… I added a new basicblock and I want to add a jump to an another BB from my new BB. Here is my code : bool Obfuscation::runOnMachineFunction(MachineFunction &MF) { MachineBasicBlock *newEntry = MF.CreateMachineBasicBlock(); MF.insert(MF.begin(), newEntry); std::vector<MachineBasicBlock*> origBB; for(MachineFunction::iterator i = MF.begin(); i != MF.end(); ++i) origBB.push_back(i); for(unsigned int i = 0; i < origBB.size(); ++i) origBB.at(i)->moveAfter(newEntry); MCIns...

On Aug 6, 2009, at 5:45 AM, Artjom Kochtchi wrote: > So I was searching for a possibility to include an additional > (Machine)BasicBlock (or rather a MachineFunction?) somewhere in the > program > that contains the program termination and that I can jump to on check > failure. Can't I do that during a Pass in llc? If you just have a magic block of instructions you want to

...o be 100 percent sure I am doing this correctly. Would the following code be enough to add a simple unconditional branch instruction to a machine instruction? Do I need to set some key items in the MachineBasicBlock too? Is there more documentation on this subject? MachineBasicBlock * mbb = mf->CreateMachineBasicBlock( 0 ); mbb->getNumber(); TargetInstrDesc tid; tid.Opcode = TID::Branch; tid.NumOperands = 1; MachineInstr * instr = mf->CreateMachineInstr( tid, DebugLoc() ); mbb->insert( mbb->end(), instr ); Thanks, Jeff Kunkel

Kenneth Uildriks wrote: > > Does the error function *have* to be auto-generated in your pass? > Perhaps the original code should use invokes, and your pass insert the > error check with a jne to the "unwind" block. > If I understand correctly, unwind is some kind of exception handling in LLVM IR? I'm not sure if this is the right thing. First, I include runtime

...> void X86CFIOptPass::insertBasicBlockBefore(MachineFunction&MF, >> MachineBasicBlock *Pred, >> MachineFunction::iterator I){ >> const BasicBlock* LLVM_BB = Pred->getBasicBlock(); >> MachineBasicBlock * MBB = MF.CreateMachineBasicBlock(LLVM_BB); // >> create a MBB >> MBB->setNumber(19880616); // set the number of MBB to be 19880616 >> which is used as an ID >> >> Pred->addSuccessor(MBB); >> const TargetInstrInfo *TII = MF.getTarget().getInstrInfo(); >> DebugLoc dl; >&...

Hi, What kind of C/C++ high level code can generate a computed jump, such as: jmpq *%r14 or jmpq *(%r14,%rbx,8) ? I imagine that any calls (including virtual) would use something like 'call *%r14', and the above jumps are mostly from 'switch' statements. Is this correct? Anything else? Thank you, Dan

...Its hitting assert in one of the registers that is getting reused in the cloned block What I am trying to do is to use exact set of virtual registers in both the blocks. Will it cause any issues?   Here is the snippet of what the code does:  MachineBasicBlock* I;  MachineBasicBlock* copy;   copy = createMachineBasicBlock(I->getBasicBlock());   Clone all the instrs from I --> copy Copy all the successor of ‘I’ to ‘copy’ as well   If ‘I’ has 2 predecessors, then update the succ list of the second pred to point to ‘copy’ and insert ‘copy’ after the second pred (‘I’ physically resides after the first pred):   Mac...

...restore) + + + const BasicBlock *BB = MBB->getBasicBlock(); + MachineFunction::iterator It = ++MBB->getIterator(); + MachineBasicBlock *thisMBB = MBB; + const BasicBlock* mainBB = BasicBlock::Create(BB->getContext(), "setjmp.main"); + MachineBasicBlock *mainMBB = MF->CreateMachineBasicBlock(mainBB); + mainMBB->setHasAddressTaken(); + const BasicBlock* sinkBB = BasicBlock::Create(BB->getContext(), "setjmp.sink"); + MachineBasicBlock *sinkMBB = MF->CreateMachineBasicBlock(sinkBB); + sinkMBB->setHasAddressTaken(); + + MF->insert(It, mainMBB); + MF-&gt...