search for: cqe_size

...; /* We assume a 1:1 mapping between CQEs and Rx descriptors, so Rx > * descriptor offset can be deduced from the CQE index instead of > * reading 'cqe->index' */ > index = cq->mcq.cons_index & ring->size_mask; > cqe = mlx4_en_get_cqe(cq->buf, index, priv->cqe_size) + factor; > ``` > > It seems that although they have a completion > queue, they are still using the ring in order. I guess so (at least from the above bits). Git grep -i "out of order" in drivers/net gives some hints. Looks like there're few deivces do this. > I gue...

...; /* We assume a 1:1 mapping between CQEs and Rx descriptors, so Rx > * descriptor offset can be deduced from the CQE index instead of > * reading 'cqe->index' */ > index = cq->mcq.cons_index & ring->size_mask; > cqe = mlx4_en_get_cqe(cq->buf, index, priv->cqe_size) + factor; > ``` > > It seems that although they have a completion > queue, they are still using the ring in order. I guess so (at least from the above bits). Git grep -i "out of order" in drivers/net gives some hints. Looks like there're few deivces do this. > I gue...

On 2018?05?16? 22:33, Tiwei Bie wrote: > On Wed, May 16, 2018 at 10:05:44PM +0800, Jason Wang wrote: >> On 2018?05?16? 21:45, Tiwei Bie wrote: >>> On Wed, May 16, 2018 at 08:51:43PM +0800, Jason Wang wrote: >>>> On 2018?05?16? 20:39, Tiwei Bie wrote: >>>>> On Wed, May 16, 2018 at 07:50:16PM +0800, Jason Wang wrote: >>>>>> On

On 2018?05?16? 22:33, Tiwei Bie wrote: > On Wed, May 16, 2018 at 10:05:44PM +0800, Jason Wang wrote: >> On 2018?05?16? 21:45, Tiwei Bie wrote: >>> On Wed, May 16, 2018 at 08:51:43PM +0800, Jason Wang wrote: >>>> On 2018?05?16? 20:39, Tiwei Bie wrote: >>>>> On Wed, May 16, 2018 at 07:50:16PM +0800, Jason Wang wrote: >>>>>> On

...n_process_rx_cq(): ``` /* We assume a 1:1 mapping between CQEs and Rx descriptors, so Rx * descriptor offset can be deduced from the CQE index instead of * reading 'cqe->index' */ index = cq->mcq.cons_index & ring->size_mask; cqe = mlx4_en_get_cqe(cq->buf, index, priv->cqe_size) + factor; ``` It seems that although they have a completion queue, they are still using the ring in order. I guess maybe storage device may want OOO. Best regards, Tiwei Bie > > Thanks > > > > > > Not for the patch, but it looks like having a OUT_OF_ORDER feature bit...

...en CQEs and Rx descriptors, so Rx >>> * descriptor offset can be deduced from the CQE index instead of >>> * reading 'cqe->index' */ >>> index = cq->mcq.cons_index & ring->size_mask; >>> cqe = mlx4_en_get_cqe(cq->buf, index, priv->cqe_size) + factor; >>> ``` >>> >>> It seems that although they have a completion >>> queue, they are still using the ring in order. >> I guess so (at least from the above bits). Git grep -i "out of order" in >> drivers/net gives some hints. Looks li...

...en CQEs and Rx descriptors, so Rx >>> * descriptor offset can be deduced from the CQE index instead of >>> * reading 'cqe->index' */ >>> index = cq->mcq.cons_index & ring->size_mask; >>> cqe = mlx4_en_get_cqe(cq->buf, index, priv->cqe_size) + factor; >>> ``` >>> >>> It seems that although they have a completion >>> queue, they are still using the ring in order. >> I guess so (at least from the above bits). Git grep -i "out of order" in >> drivers/net gives some hints. Looks li...

...mapping between CQEs and Rx descriptors, so Rx > > * descriptor offset can be deduced from the CQE index instead of > > * reading 'cqe->index' */ > > index = cq->mcq.cons_index & ring->size_mask; > > cqe = mlx4_en_get_cqe(cq->buf, index, priv->cqe_size) + factor; > > ``` > > > > It seems that although they have a completion > > queue, they are still using the ring in order. > > I guess so (at least from the above bits). Git grep -i "out of order" in > drivers/net gives some hints. Looks like there'...

...so Rx > > > > * descriptor offset can be deduced from the CQE index instead of > > > > * reading 'cqe->index' */ > > > > index = cq->mcq.cons_index & ring->size_mask; > > > > cqe = mlx4_en_get_cqe(cq->buf, index, priv->cqe_size) + factor; > > > > ``` > > > > > > > > It seems that although they have a completion > > > > queue, they are still using the ring in order. > > > I guess so (at least from the above bits). Git grep -i "out of order" in > > &g...

Hi, This is the first attempt to add a new qemu nvme backend using in-kernel nvme target. Most code are ported from qemu-nvme and also borrow code from Hannes Reinecke's rts-megasas. It's similar as vhost-scsi, but doesn't use virtio. The advantage is guest can run unmodified NVMe driver. So guest can be any OS that has a NVMe driver. The goal is to get as good performance as

Hi, This is the first attempt to add a new qemu nvme backend using in-kernel nvme target. Most code are ported from qemu-nvme and also borrow code from Hannes Reinecke's rts-megasas. It's similar as vhost-scsi, but doesn't use virtio. The advantage is guest can run unmodified NVMe driver. So guest can be any OS that has a NVMe driver. The goal is to get as good performance as

Hi all, These 2 patches added virtio-nvme to kernel and qemu, basically modified from virtio-blk and nvme code. As title said, request for your comments. Play it in Qemu with: -drive file=disk.img,format=raw,if=none,id=D22 \ -device virtio-nvme-pci,drive=D22,serial=1234,num_queues=4 The goal is to have a full NVMe stack from VM guest(virtio-nvme) to host(vhost_nvme) to LIO NVMe-over-fabrics

Hi all, These 2 patches added virtio-nvme to kernel and qemu, basically modified from virtio-blk and nvme code. As title said, request for your comments. Play it in Qemu with: -drive file=disk.img,format=raw,if=none,id=D22 \ -device virtio-nvme-pci,drive=D22,serial=1234,num_queues=4 The goal is to have a full NVMe stack from VM guest(virtio-nvme) to host(vhost_nvme) to LIO NVMe-over-fabrics

..._RESET | VIRTIO_CONFIG_S_FAILED) > + > +struct mlx5_vdpa_net_resources { > + u32 tisn; > + u32 tdn; > + u32 tirn; > + u32 rqtn; > + bool valid; > +}; > + > +struct mlx5_vdpa_cq_buf { > + struct mlx5_frag_buf_ctrl fbc; > + struct mlx5_frag_buf frag_buf; > + int cqe_size; > + int nent; > +}; > + > +struct mlx5_vdpa_cq { > + struct mlx5_core_cq mcq; > + struct mlx5_vdpa_cq_buf buf; > + struct mlx5_db db; > + int cqe; > +}; > + > +struct mlx5_vdpa_umem { > + struct mlx5_frag_buf_ctrl fbc; > + struct mlx5_frag_buf frag_buf; >...