search for: cpustate

...+1100 @@ -211,7 +211,7 @@ target_phys_addr_t cpu_get_phys_page_deb } //some functions to handle the io req packet -void sp_info(void) +static void sp_info(void) { ioreq_t *req; int i; @@ -281,7 +281,8 @@ static ioreq_t *cpu_get_ioreq(void) return NULL; } -unsigned long do_inp(CPUState *env, unsigned long addr, unsigned long size) +static unsigned long do_inp(CPUState *env, unsigned long addr, + unsigned long size) { switch(size) { case 1: @@ -296,8 +297,8 @@ unsigned long do_inp(CPUState *env, unsi } } -void do_outp(CPUState *env, un...

[PATCH 3/4] modify account_system_time() to add cputime to cpustat->guest i= f we are running a VCPU. We add this cputime to cpustat->user instead of cpustat->system because this part of KVM code is in fact user code although= it is executed in the kernel. We duplicate VCPU time between guest and user to allow an unmodified "top(1)" to display correct value. A modified

[PATCH 3/4] modify account_system_time() to add cputime to cpustat->guest i= f we are running a VCPU. We add this cputime to cpustat->user instead of cpustat->system because this part of KVM code is in fact user code although= it is executed in the kernel. We duplicate VCPU time between guest and user to allow an unmodified "top(1)" to display correct value. A modified

The aim of these four patches is to introduce Virtual Machine time accounting. _Ingo_, as these patches modify files of the scheduler, could you have a look to them, please ? [PATCH 1/4] as recent CPUs introduce a third running state, after "user" and "system", we need a new field, "guest", in cpustat to store the time used by the CPU to run virtual CPU. Modify

The aim of these four patches is to introduce Virtual Machine time accounting. _Ingo_, as these patches modify files of the scheduler, could you have a look to them, please ? [PATCH 1/4] as recent CPUs introduce a third running state, after "user" and "system", we need a new field, "guest", in cpustat to store the time used by the CPU to run virtual CPU. Modify

...st. 2) do nothing, just go to sleep. Could you get (or do you have) numbers for (2)? More important, I think a barrier is missing: Lock holder --------------------------------------- // queue_spin_unlock barrier(); ACCESS_ONCE(qlock->lock) = 0; barrier(); // pv_kick_node: if (pv->cpustate != PV_CPU_HALTED) return; ACCESS_ONCE(pv->cpustate) = PV_CPU_KICKED; __queue_kick_cpu(pv->mycpu, PV_KICK_QUEUE_HEAD); Waiter ------------------------------------------- // pv_head_spin_check ACCESS_ONCE(pv->cpustate) = PV_CPU_HALTED; lockval = cmpxchg(&qlock->lock,...

On 12/03/14 18:54, Waiman Long wrote: > This patch adds para-virtualization support to the queue spinlock in > the same way as was done in the PV ticket lock code. In essence, the > lock waiters will spin for a specified number of times (QSPIN_THRESHOLD > = 2^14) and then halted itself. The queue head waiter will spins > 2*QSPIN_THRESHOLD times before halting itself. When it has

On 12/03/14 18:54, Waiman Long wrote: > This patch adds para-virtualization support to the queue spinlock in > the same way as was done in the PV ticket lock code. In essence, the > lock waiters will spin for a specified number of times (QSPIN_THRESHOLD > = 2^14) and then halted itself. The queue head waiter will spins > 2*QSPIN_THRESHOLD times before halting itself. When it has

...CKED, 0) == _QSPINLOCK_LOCKED)) return; else queue_spin_unlock_slowpath(lock); } else { __queue_spin_unlock(lock); } > // pv_kick_node: > if (pv->cpustate != PV_CPU_HALTED) > return; > ACCESS_ONCE(pv->cpustate) = PV_CPU_KICKED; > __queue_kick_cpu(pv->mycpu, PV_KICK_QUEUE_HEAD); > > Waiter ------------------------------------------- > > // pv_head_spin_check > ACCESS_ONCE(pv->cpu...

...CKED, 0) == _QSPINLOCK_LOCKED)) return; else queue_spin_unlock_slowpath(lock); } else { __queue_spin_unlock(lock); } > // pv_kick_node: > if (pv->cpustate != PV_CPU_HALTED) > return; > ACCESS_ONCE(pv->cpustate) = PV_CPU_KICKED; > __queue_kick_cpu(pv->mycpu, PV_KICK_QUEUE_HEAD); > > Waiter ------------------------------------------- > > // pv_head_spin_check > ACCESS_ONCE(pv->cpu...

...question is: what larger goal are you trying to accomplish? >> Holding a constant value in a register might not be the best way to do what >> you're doing. >> > I am using LLVM as the code generator for my system emulator. I need > one register holding the address of the CPUState struct. most of the > emulation code is generated by LLVM. a small amount of code is not ( > typically binary patched) . I must make sure that i know in which > register is the CPUState held when i am patching some code. Is there just one CPUState struct for the entire simulator, or are...

Laurent Vivier wrote: > The aim of these two patches is to measure the CPU time used by a virtual > machine. All comments are welcome... I'm not sure it's the good way to do that. > > [PATCH 1/2] introduce a new field, "guest", in cpustat to store the time used by > the CPU to run virtual CPU. Modify /proc/stat to display this new field. > > [PATCH 2/2]

Laurent Vivier wrote: > The aim of these two patches is to measure the CPU time used by a virtual > machine. All comments are welcome... I'm not sure it's the good way to do that. > > [PATCH 1/2] introduce a new field, "guest", in cpustat to store the time used by > the CPU to run virtual CPU. Modify /proc/stat to display this new field. > > [PATCH 2/2]

...-----+------------+------------+------------+ + * | PV Node 0 | PV Node 1 | PV Node 2 | PV Node 3 | + * +------------+------------+------------+------------+ + */ +struct pv_qnode { + struct mcs_spinlock mcs; /* MCS node */ + struct mcs_spinlock dummy[3]; /* 3 dummy MCS nodes */ + s8 cpustate; /* CPU status flag */ + s8 mayhalt; /* May be halted soon */ + u32 mycpu; /* CPU number of this node */ + struct pv_qnode *prev; /* Pointer to previous node */ +}; + +#define qhead mcs.locked /* Queue head flag */ + +/** + * pv_init_vars - initialize fields in struct pv_qnode +...

...r. > > The real question is: what larger goal are you trying to accomplish? > Holding a constant value in a register might not be the best way to do what > you're doing. > I am using LLVM as the code generator for my system emulator. I need one register holding the address of the CPUState struct. most of the emulation code is generated by LLVM. a small amount of code is not ( typically binary patched) . I must make sure that i know in which register is the CPUState held when i am patching some code. Xin > -- John T. > > >> >> On Jul 19, 2012, at 11:14 AM, Xin...

...ER_SHIFT 15 +#define MSI_DATA_LEVEL_SHIFT 14 +#define MSI_ADDR_DEST_MODE_SHIFT 2 +#define MSI_ADDR_DEST_ID_SHIFT 12 +#define MSI_ADDR_DEST_ID_MASK 0x00ffff0 + +#define MSI_ADDR_BASE 0xfee00000 +#define MSI_ADDR_SIZE 0x100000 + typedef struct APICState { CPUState *cpu_env; uint32_t apicbase; @@ -712,11 +727,31 @@ static uint32_t apic_mem_readl(void *opaque, target_phys_addr_t addr) return val; } +static void apic_send_msi(target_phys_addr_t addr, uint32 data) +{ + uint8_t dest = (addr & MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID_SH...

...ER_SHIFT 15 +#define MSI_DATA_LEVEL_SHIFT 14 +#define MSI_ADDR_DEST_MODE_SHIFT 2 +#define MSI_ADDR_DEST_ID_SHIFT 12 +#define MSI_ADDR_DEST_ID_MASK 0x00ffff0 + +#define MSI_ADDR_BASE 0xfee00000 +#define MSI_ADDR_SIZE 0x100000 + typedef struct APICState { CPUState *cpu_env; uint32_t apicbase; @@ -712,11 +727,31 @@ static uint32_t apic_mem_readl(void *opaque, target_phys_addr_t addr) return val; } +static void apic_send_msi(target_phys_addr_t addr, uint32 data) +{ + uint8_t dest = (addr & MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID_SH...

Author: kucharsk Repository: /hg/zfs-crypto/gate Revision: 1ba8dc174f7355edbe8ab8aaf6ac96aef70eb746 Log message: 6352844 cpustat always returns same value for all events in single event specification on amd64 Files: update: usr/src/uts/intel/pcbe/opteron_pcbe.c

...--+------------+------------+------------+ + * | PV Node 0 | PV Node 1 | PV Node 2 | PV Node 3 | + * +------------+------------+------------+------------+ + */ +struct pv_qnode { + struct mcs_spinlock mcs; /* MCS node */ + struct mcs_spinlock __res[3]; /* 3 reserved MCS nodes */ + s8 cpustate; /* CPU status flag */ + s8 mayhalt; /* May be halted soon */ + int mycpu; /* CPU number of this node */ + struct mcs_spinlock *head; /* Queue head node pointer */ +}; + +/** + * pv_init_node - initialize fields in struct pv_qnode + * @node: pointer to struct mcs_spinlock + * @cpu :...

...--+------------+------------+------------+ + * | PV Node 0 | PV Node 1 | PV Node 2 | PV Node 3 | + * +------------+------------+------------+------------+ + */ +struct pv_qnode { + struct mcs_spinlock mcs; /* MCS node */ + struct mcs_spinlock __res[3]; /* 3 reserved MCS nodes */ + s8 cpustate; /* CPU status flag */ + s8 mayhalt; /* May be halted soon */ + int mycpu; /* CPU number of this node */ + struct mcs_spinlock *head; /* Queue head node pointer */ +}; + +/** + * pv_init_node - initialize fields in struct pv_qnode + * @node: pointer to struct mcs_spinlock + * @cpu :...