search for: cpuregsregclass

...stream. The Liskov substitution principle for register classes is deeply ingrained in the LLVM register allocators. > > /jakob > I guess I can just fix the problem with: if ((RC == &Mips::CPU16RegsRegClass) && !TM.getSubtargetImpl()->inMips16Mode()) RC = &Mips::CPURegsRegClass;

...iple for register classes is deeply ingrained in the LLVM register allocators. >> >> /jakob >> > I guess I can just fix the problem with: > > if ((RC == &Mips::CPU16RegsRegClass) && > !TM.getSubtargetImpl()->inMips16Mode()) > RC = &Mips::CPURegsRegClass; Can I ask what concrete problem you're seeing? The ARM backend has exactly the same issue: in Thumb1 mode (similar to MIPS16), not all GPRs are available. Accordingly, getMinimalPhysRegClass() returns tGPR (Thumb GPR) for those registers that are accessible in Thumb1 mode. What Jakob's...

...Mips/Mips16ISelLowering.cpp @@ -39,6 +39,14 @@ namespace { Mips16TargetLowering::Mips16TargetLowering(MipsTargetMachine &TM) : MipsTargetLowering(TM) { + // + // set up as if mips32 and then revert so we can test the mechanism + // for switching + addRegisterClass(MVT::i32, &Mips::CPURegsRegClass); + addRegisterClass(MVT::f32, &Mips::FGR32RegClass); + computeRegisterProperties(); + clearRegisterClasses(); + // Set up the register classes addRegisterClass(MVT::i32, &Mips::CPU16RegsRegClass);

Does anyone understand the purpose of : TargetRegisterInfo::getMinimalPhysRegClass ??? Why is there the presumption to use the minimal subclass? For Mips, it would work for me if we changed this to a virtual function and then I could override this to have it chose the proper register class based on the processor. I want to introduct a different register class for MIPS 16 but don't want

On May 14, 2012, at 2:28 PM, reed kotler wrote: > I'm not using getMinimalPhysRegClass. Some target independent code is using it. Probably PEI. > It makes trouble for us and I would like to submit a patch to make it a virtual function so that I can override it and make it meaningful for Mips, as long as this method still exists. > > I want to add another register class for

On 05/14/2012 02:17 PM, Jakob Stoklund Olesen wrote: > On May 14, 2012, at 1:02 PM, reed kotler wrote: > >> Does anyone understand the purpose of : >> >> TargetRegisterInfo::getMinimalPhysRegClass ??? > Barely. > >> Why is there the presumption to use the minimal subclass? > The function can be traced back to a time when men were men and registers belonged to

...ng.cpp @@ -27,6 +27,9 @@ EnableMipsTailCalls("enable-mips-tail-calls", cl::Hidden, MipsSETargetLowering::MipsSETargetLowering(MipsTargetMachine &TM) : MipsTargetLowering(TM) { // Set up the register classes + + clearRegisterClasses(); + addRegisterClass(MVT::i32, &Mips::CPURegsRegClass); if (HasMips64) diff --git a/lib/Target/Mips/MipsSubtarget.cpp b/lib/Target/Mips/MipsSubtarget.cpp index e11e5d1..4f56bd5 100644 --- a/lib/Target/Mips/MipsSubtarget.cpp +++ b/lib/Target/Mips/MipsSubtarget.cpp @@ -11,29 +11,47 @@ // //===------------------------------------------------------...

On Thu, Mar 28, 2013 at 12:22 PM, Nadav Rotem <nrotem at apple.com> wrote: > IMHO the right way to handle target function attributes is to > re-initialize the target machine and TTI for every function (if the > attributes changed). Do you have another solution in mind ? I don't really understand this. TargetMachine and TTI may be quite expensive to initialize. Doing so for