Displaying 20 results from an estimated 154 matches for "cpuinfo_x86".
2007 Apr 18
0
[PATCH 2/2] x86: clean up identify_cpu
...========================================
--- a/arch/i386/kernel/cpu/common.c
+++ b/arch/i386/kernel/cpu/common.c
@@ -390,7 +390,7 @@ __setup("serialnumber", x86_serial_nr_se
/*
* This does the hard work of actually picking apart the CPU stuff...
*/
-void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
+static void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
{
int i;
@@ -486,30 +486,43 @@ void __cpuinit identify_cpu(struct cpuin
for (i = 0; i < NCAPINTS; i++)
printk(" %08lx", c->x86_capability[i]);
printk("\n");
-
+}
+
+void __init identify_boot_cpu(voi...
2007 Apr 18
0
[PATCH 2/2] x86: clean up identify_cpu
...========================================
--- a/arch/i386/kernel/cpu/common.c
+++ b/arch/i386/kernel/cpu/common.c
@@ -390,7 +390,7 @@ __setup("serialnumber", x86_serial_nr_se
/*
* This does the hard work of actually picking apart the CPU stuff...
*/
-void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
+static void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
{
int i;
@@ -486,30 +486,43 @@ void __cpuinit identify_cpu(struct cpuin
for (i = 0; i < NCAPINTS; i++)
printk(" %08lx", c->x86_capability[i]);
printk("\n");
-
+}
+
+void __init identify_boot_cpu(voi...
2013 Apr 09
2
[PATCH v2] x86: use fixed read-only IDT
...__pa_symbol(idt_table), PAGE_KERNEL_RO);
-
- /*
- * Update the IDT descriptor and reload the IDT so that
- * it uses the read-only mapped virtual address.
- */
- idt_descr.address = fix_to_virt(FIX_F00F_IDT);
- load_idt(&idt_descr);
-}
-#endif
-
static void __cpuinit intel_smp_check(struct cpuinfo_x86 *c)
{
/* calling is from identify_secondary_cpu() ? */
@@ -206,8 +192,7 @@ static void __cpuinit intel_workarounds(struct cpuinfo_x86 *c)
/*
* All current models of Pentium and Pentium with MMX technology CPUs
* have the F0 0F bug, which lets nonprivileged users lock up the
- * system....
2013 Apr 09
2
[PATCH v2] x86: use fixed read-only IDT
...__pa_symbol(idt_table), PAGE_KERNEL_RO);
-
- /*
- * Update the IDT descriptor and reload the IDT so that
- * it uses the read-only mapped virtual address.
- */
- idt_descr.address = fix_to_virt(FIX_F00F_IDT);
- load_idt(&idt_descr);
-}
-#endif
-
static void __cpuinit intel_smp_check(struct cpuinfo_x86 *c)
{
/* calling is from identify_secondary_cpu() ? */
@@ -206,8 +192,7 @@ static void __cpuinit intel_workarounds(struct cpuinfo_x86 *c)
/*
* All current models of Pentium and Pentium with MMX technology CPUs
* have the F0 0F bug, which lets nonprivileged users lock up the
- * system....
2008 Oct 08
0
[PATCH 2/4] Import upstream git commit e9dff0ee6694b2edd40b1b448cb786f6a7b02336
...2193e06af9 arch/i386/kernel/cpu/amd.c
--- a/arch/i386/kernel/cpu/amd.c Wed Oct 08 13:06:36 2008 +0100
+++ b/arch/i386/kernel/cpu/amd.c Wed Oct 08 13:30:41 2008 +0100
@@ -246,7 +246,7 @@ static void __init init_amd(struct cpuin
num_cache_leaves = 3;
}
-static unsigned int amd_size_cache(struct cpuinfo_x86 * c, unsigned int size)
+static unsigned int __cpuinit amd_size_cache(struct cpuinfo_x86 * c, unsigned int size)
{
/* AMD errata T13 (order #21922) */
if ((c->x86 == 6)) {
diff -r 3be554b47704 -r 0c2193e06af9 arch/i386/kernel/cpu/centaur.c
--- a/arch/i386/kernel/cpu/centaur.c Wed Oct 08 13:...
2011 Apr 26
4
RHEL 6/CentOS
...xcf/0xdb
[<c0a406da>] ? start_kernel+0xca/0x3a4
---[ end trace a7919e7f17c0a725 ]---
Disabling lock debugging due to kernel taint
I traced it down to this code, which is not in the standard kernel.org kernel-2.6.32.36:
from kernel-2.6.32.36
static void __cpuinit early_init_centaur(struct cpuinfo_x86 *c)
{
switch (c->x86) {
from 2.6.32-71.24.1.el6.ayplus
arch/x86/kernel/cpu/centaur.c
static void __cpuinit early_init_centaur(struct cpuinfo_x86 *c)
{
mark_hardware_unsupported("Centaur Processor"); <<<<<<<<<<
switch (c->x86) {...
2013 Apr 10
1
[PATCH v3] x86: use a read-only IDT alias on all CPUs
...__pa_symbol(idt_table), PAGE_KERNEL_RO);
-
- /*
- * Update the IDT descriptor and reload the IDT so that
- * it uses the read-only mapped virtual address.
- */
- idt_descr.address = fix_to_virt(FIX_F00F_IDT);
- load_idt(&idt_descr);
-}
-#endif
-
static void __cpuinit intel_smp_check(struct cpuinfo_x86 *c)
{
/* calling is from identify_secondary_cpu() ? */
@@ -206,8 +192,7 @@ static void __cpuinit intel_workarounds(struct cpuinfo_x86 *c)
/*
* All current models of Pentium and Pentium with MMX technology CPUs
* have the F0 0F bug, which lets nonprivileged users lock up the
- * system....
2013 Apr 10
1
[PATCH v3] x86: use a read-only IDT alias on all CPUs
...__pa_symbol(idt_table), PAGE_KERNEL_RO);
-
- /*
- * Update the IDT descriptor and reload the IDT so that
- * it uses the read-only mapped virtual address.
- */
- idt_descr.address = fix_to_virt(FIX_F00F_IDT);
- load_idt(&idt_descr);
-}
-#endif
-
static void __cpuinit intel_smp_check(struct cpuinfo_x86 *c)
{
/* calling is from identify_secondary_cpu() ? */
@@ -206,8 +192,7 @@ static void __cpuinit intel_workarounds(struct cpuinfo_x86 *c)
/*
* All current models of Pentium and Pentium with MMX technology CPUs
* have the F0 0F bug, which lets nonprivileged users lock up the
- * system....
2011 Dec 15
10
fsincos emulation on AMD CPUs
All,
in the light of erratum #573 I''m wondering if we need to tweak or
conditionally suppress fsincos emulation. The question is whether there
is any possibility for getting the emulator to hit this instruction on AMD
(as no real mode emulation ought to be taking place there), i.e.
whether there are places where emulation gets continued eagerly
in anticipation of the need for emulation
2012 Mar 01
3
[PATCH v2] x86: Use deep C states for off-lined CPUs
...le.c
--- a/xen/arch/x86/acpi/cpu_idle.c Mon Feb 27 17:05:18 2012 +0000
+++ b/xen/arch/x86/acpi/cpu_idle.c Thu Mar 01 23:52:41 2012 +0100
@@ -566,6 +566,7 @@ static void acpi_dead_idle(void)
struct acpi_processor_power *power;
struct acpi_processor_cx *cx;
void *mwait_ptr;
+ struct cpuinfo_x86 *c = ¤t_cpu_data;
if ( (power = processor_powers[smp_processor_id()]) == NULL )
goto default_halt;
@@ -601,6 +602,23 @@ static void acpi_dead_idle(void)
mb();
__mwait(cx->address, 0);
}
+ }
+ else if ( c->x86_vendor == X86_VE...
2013 Apr 08
3
[PATCH] x86: make IDT read-only
...__pa_symbol(idt_table), PAGE_KERNEL_RO);
-
- /*
- * Update the IDT descriptor and reload the IDT so that
- * it uses the read-only mapped virtual address.
- */
- idt_descr.address = fix_to_virt(FIX_F00F_IDT);
- load_idt(&idt_descr);
-}
-#endif
-
static void __cpuinit intel_smp_check(struct cpuinfo_x86 *c)
{
/* calling is from identify_secondary_cpu() ? */
@@ -215,7 +201,6 @@ static void __cpuinit intel_workarounds(struct cpuinfo_x86 *c)
c->f00f_bug = 1;
if (!f00f_workaround_enabled) {
- trap_init_f00f_bug();
printk(KERN_NOTICE "Intel Pentium with F0 0F bug - workaround e...
2013 Apr 08
3
[PATCH] x86: make IDT read-only
...__pa_symbol(idt_table), PAGE_KERNEL_RO);
-
- /*
- * Update the IDT descriptor and reload the IDT so that
- * it uses the read-only mapped virtual address.
- */
- idt_descr.address = fix_to_virt(FIX_F00F_IDT);
- load_idt(&idt_descr);
-}
-#endif
-
static void __cpuinit intel_smp_check(struct cpuinfo_x86 *c)
{
/* calling is from identify_secondary_cpu() ? */
@@ -215,7 +201,6 @@ static void __cpuinit intel_workarounds(struct cpuinfo_x86 *c)
c->f00f_bug = 1;
if (!f00f_workaround_enabled) {
- trap_init_f00f_bug();
printk(KERN_NOTICE "Intel Pentium with F0 0F bug - workaround e...
2013 Jan 17
1
[PATCH] x86, Allow x2apic without IR on VMware platform.
...files changed, 26 insertions(+), 9 deletions(-)
diff --git a/arch/x86/include/asm/hypervisor.h b/arch/x86/include/asm/hypervisor.h
index b518c75..86095ed 100644
--- a/arch/x86/include/asm/hypervisor.h
+++ b/arch/x86/include/asm/hypervisor.h
@@ -25,6 +25,7 @@
extern void init_hypervisor(struct cpuinfo_x86 *c);
extern void init_hypervisor_platform(void);
+extern bool hypervisor_x2apic_available(void);
/*
* x86 hypervisor information
@@ -41,6 +42,9 @@ struct hypervisor_x86 {
/* Platform setup (run once per boot) */
void (*init_platform)(void);
+
+ /* X2APIC detection (run once per boot) *...
2013 Jan 17
1
[PATCH] x86, Allow x2apic without IR on VMware platform.
...files changed, 26 insertions(+), 9 deletions(-)
diff --git a/arch/x86/include/asm/hypervisor.h b/arch/x86/include/asm/hypervisor.h
index b518c75..86095ed 100644
--- a/arch/x86/include/asm/hypervisor.h
+++ b/arch/x86/include/asm/hypervisor.h
@@ -25,6 +25,7 @@
extern void init_hypervisor(struct cpuinfo_x86 *c);
extern void init_hypervisor_platform(void);
+extern bool hypervisor_x2apic_available(void);
/*
* x86 hypervisor information
@@ -41,6 +42,9 @@ struct hypervisor_x86 {
/* Platform setup (run once per boot) */
void (*init_platform)(void);
+
+ /* X2APIC detection (run once per boot) *...
2013 Jul 25
2
[PATCH V2 4/4] x86: correctly detect hypervisor
...x86/include/asm/hypervisor.h
+++ b/arch/x86/include/asm/hypervisor.h
@@ -33,7 +33,7 @@ struct hypervisor_x86 {
const char *name;
/* Detection routine */
- bool (*detect)(void);
+ uint32_t (*detect)(void);
/* Adjust CPU feature bits (run once per CPU) */
void (*set_cpu_features)(struct cpuinfo_x86 *);
diff --git a/arch/x86/kernel/cpu/hypervisor.c b/arch/x86/kernel/cpu/hypervisor.c
index 8727921..36ce402 100644
--- a/arch/x86/kernel/cpu/hypervisor.c
+++ b/arch/x86/kernel/cpu/hypervisor.c
@@ -25,11 +25,6 @@
#include <asm/processor.h>
#include <asm/hypervisor.h>
-/*
- * Hypervis...
2013 Jul 25
2
[PATCH V2 4/4] x86: correctly detect hypervisor
...x86/include/asm/hypervisor.h
+++ b/arch/x86/include/asm/hypervisor.h
@@ -33,7 +33,7 @@ struct hypervisor_x86 {
const char *name;
/* Detection routine */
- bool (*detect)(void);
+ uint32_t (*detect)(void);
/* Adjust CPU feature bits (run once per CPU) */
void (*set_cpu_features)(struct cpuinfo_x86 *);
diff --git a/arch/x86/kernel/cpu/hypervisor.c b/arch/x86/kernel/cpu/hypervisor.c
index 8727921..36ce402 100644
--- a/arch/x86/kernel/cpu/hypervisor.c
+++ b/arch/x86/kernel/cpu/hypervisor.c
@@ -25,11 +25,6 @@
#include <asm/processor.h>
#include <asm/hypervisor.h>
-/*
- * Hypervis...
2013 Jul 25
2
[PATCH V2 4/4] x86: correctly detect hypervisor
...x86/include/asm/hypervisor.h
+++ b/arch/x86/include/asm/hypervisor.h
@@ -33,7 +33,7 @@ struct hypervisor_x86 {
const char *name;
/* Detection routine */
- bool (*detect)(void);
+ uint32_t (*detect)(void);
/* Adjust CPU feature bits (run once per CPU) */
void (*set_cpu_features)(struct cpuinfo_x86 *);
diff --git a/arch/x86/kernel/cpu/hypervisor.c b/arch/x86/kernel/cpu/hypervisor.c
index 8727921..36ce402 100644
--- a/arch/x86/kernel/cpu/hypervisor.c
+++ b/arch/x86/kernel/cpu/hypervisor.c
@@ -25,11 +25,6 @@
#include <asm/processor.h>
#include <asm/hypervisor.h>
-/*
- * Hypervis...
2007 Apr 18
4
[patch 0/4] Clean up asm/bugs.h, identify_cpu() and update COMPAT_VDSO
Hi Andi,
Four patches:
- clean up asm/bugs.h, by moving all the C code into its own C file
- split identify_cpu() into boot and secondary variants, so that
boot-time setup functions can be marked __init
- repost of the COMPAT_VDSO patches with a bit more robustness from
unknown DT_tags, and functions marked __init, since all this is
boot-time only setup.
Thanks,
J
--
2007 Apr 18
4
[patch 0/4] Clean up asm/bugs.h, identify_cpu() and update COMPAT_VDSO
Hi Andi,
Four patches:
- clean up asm/bugs.h, by moving all the C code into its own C file
- split identify_cpu() into boot and secondary variants, so that
boot-time setup functions can be marked __init
- repost of the COMPAT_VDSO patches with a bit more robustness from
unknown DT_tags, and functions marked __init, since all this is
boot-time only setup.
Thanks,
J
--
2018 Jan 22
0
[PATCH 5/6] x86/jailhouse: Allow to use PCI_MMCONFIG without ACPI
...-$(CONFIG_MMCONF_FAM10H) += mmconf-fam10h_64.o
obj-y += vsmp_64.o
endif
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index ea831c858195..47edf599f6fd 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -690,7 +690,7 @@ static void init_amd_k8(struct cpuinfo_x86 *c)
static void init_amd_gh(struct cpuinfo_x86 *c)
{
-#ifdef CONFIG_X86_64
+#ifdef CONFIG_MMCONF_FAM10H
/* do this for boot cpu */
if (c == &boot_cpu_data)
check_enable_amd_mmconf_dmi();
--
2.13.6