Displaying 16 results from an estimated 16 matches for "cpu_feature".
2015 Jan 20
0
[RFC PATCH v1 1/2] Optimize repeated calls to opus_select_arch
...h_arm = arch;
return arch;
}
+int opus_select_arch(void)
+{
+ return (detected?arch_arm:opus_select_arch_real());
+}
+
#endif
diff --git a/celt/x86/x86cpu.c b/celt/x86/x86cpu.c
index c82a4b7..ddf3cf3 100644
--- a/celt/x86/x86cpu.c
+++ b/celt/x86/x86cpu.c
@@ -87,7 +87,10 @@ static void opus_cpu_feature_check(CPU_Feature *cpu_feature)
}
}
-int opus_select_arch(void)
+static int detected = 0;
+static int arch_x86 = 0;
+
+static int opus_select_arch_real(void)
{
CPU_Feature cpu_feature = {0};
int arch;
@@ -96,16 +99,19 @@ int opus_select_arch(void)
arch = 0;
if (!cpu_f...
2015 Mar 02
13
Patch cleaning up Opus x86 intrinsics configury
The attached patch cleans up Opus's x86 intrinsics configury.
It:
* Makes ?enable-intrinsics work with clang and other non-GCC compilers
* Enables RTCD for the floating-point-mode SSE code in Celt.
* Disables use of RTCD in cases where the compiler targets an instruction set by default.
* Enables the SSE4.1 Silk optimizations that apply to the common parts of Silk when Opus is built in
2015 Mar 13
1
[RFC PATCH v3] Intrinsics/RTCD related fixes. Mostly x86.
..._C)
__get_cpuid(InfoType, &(CPUInfo[0]), &(CPUInfo[1]), &(CPUInfo[2]), &(CPUInfo[3]));
#endif
@@ -63,11 +86,9 @@ static void cpuid(unsigned int CPUInfo[4], unsigned int InfoType)
#endif
-#include "SigProc_FIX.h"
-#include "celt_lpc.h"
-
typedef struct CPU_Feature{
/* SIMD: 128-bit */
+ int HW_SSE;
int HW_SSE2;
int HW_SSE41;
} CPU_Feature;
@@ -82,19 +103,31 @@ static void opus_cpu_feature_check(CPU_Feature *cpu_feature)
if (nIds >= 1){
cpuid(info, 1);
+ cpu_feature->HW_SSE = (info[3] & (1 << 25)) !=...
2015 Mar 12
1
[RFC PATCHv2] Intrinsics/RTCD related fixes. Mostly x86.
..._C)
__get_cpuid(InfoType, &(CPUInfo[0]), &(CPUInfo[1]), &(CPUInfo[2]), &(CPUInfo[3]));
#endif
@@ -63,11 +86,9 @@ static void cpuid(unsigned int CPUInfo[4], unsigned int InfoType)
#endif
-#include "SigProc_FIX.h"
-#include "celt_lpc.h"
-
typedef struct CPU_Feature{
/* SIMD: 128-bit */
+ int HW_SSE;
int HW_SSE2;
int HW_SSE41;
} CPU_Feature;
@@ -82,19 +103,31 @@ static void opus_cpu_feature_check(CPU_Feature *cpu_feature)
if (nIds >= 1){
cpuid(info, 1);
+ cpu_feature->HW_SSE = (info[3] & (1 << 25)) !=...
2010 Jul 06
0
[PATCH] x86/cpufreq: check array index before use
...cy = cpufreq_cpu_policy[cpu];
+ if (cpu >= NR_CPUS)
+ return 0;
- if (cpu >= NR_CPUS || !policy || !drv_data[policy->cpu])
+ policy = cpufreq_cpu_policy[cpu];
+ if (!policy || !drv_data[policy->cpu])
return 0;
switch (drv_data[policy->cpu]->cpu_feature) {
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2015 Aug 03
0
[PATCH 06/10] Remove some unnecessary #includes from x86cpu.c.
.../celt/x86/x86cpu.c b/celt/x86/x86cpu.c
index 9f570af..b901bd9 100644
--- a/celt/x86/x86cpu.c
+++ b/celt/x86/x86cpu.c
@@ -77,9 +77,6 @@ static void cpuid(unsigned int CPUInfo[4], unsigned int InfoType)
#endif
-#include "SigProc_FIX.h"
-#include "celt_lpc.h"
-
typedef struct CPU_Feature{
/* SIMD: 128-bit */
int HW_SSE2;
--
2.3.2 (Apple Git-55)
2015 Aug 03
0
[PATCH 00/10] Patched cleaning up Opus x86 intrinsics configury
...s detection of intrinsics functions
In optimized mode, don't force Clang to use explicit load/store for
_mm_cvtepi16_epi32, only for _mm_cvtepi8_epi32. Adjust comment
accordingly.
Fix instruction used for cpuid test.
Fix cpuid asm on 32-bit PIC.
Fix struct initialization of CPU_Feature structure.
Remove some unnecessary #includes from x86cpu.c.
Move SSE2 and SSE4.1 intrinsics functions to separate files, to be
compiled with appropriate compiler flags. Otherwise, compilers
are allowed to take advantage of (e.g.) -msse4.1 to generate
code that uses SSE4.1 i...
2020 Feb 14
1
[PATCH 41/62] x86/sev-es: Handle MSR events
On 2/13/20 11:23 PM, Joerg Roedel wrote:
> Yes, investigating this is on the list for future optimizations (besides
> caching CPUID results). My idea is to use alternatives patching for
> this. But the exception handling is needed anyway because #VC
> exceptions happen very early already, basically the first thing after
> setting up a stack is calling verify_cpu(), which uses CPUID.
2015 Mar 18
5
[RFC PATCH v1 0/4] Enable aarch64 intrinsics/Ne10
Hi All,
Since I continue to base my work on top of Jonathan's patch,
and my previous Ne10 fft/ifft/mdct_forward/backward patches,
I thought it would be better to just post all new patches
as a patch series. Please let me know if anyone disagrees
with this approach.
You can see wip branch of all latest patches at
https://git.linaro.org/people/viswanath.puttagunta/opus.git
Branch:
2015 Mar 31
6
[RFC PATCH v1 0/5] aarch64: celt_pitch_xcorr: Fixed point series
Hi Timothy,
As I mentioned earlier [1], I now fixed compile issues
with fixed point and resubmitting the patch.
I also have new patch that does intrinsics optimizations
for celt_pitch_xcorr targetting aarch64.
You can find my latest work-in-progress branch at [2]
For reference, you can use the Ne10 pre-built libraries
at [3]
Note that I am working with Phil at ARM to get my patch at [4]
2015 May 08
8
[RFC PATCH v2]: Ne10 fft fixed and previous 0/8]
Hi All,
As per Timothy's suggestion, disabling mdct_forward
for fixed point. Only effects
armv7,armv8: Extend fixed fft NE10 optimizations to mdct
Rest of patches are same as in [1]
For reference, latest wip code for opus is at [2]
Still working with NE10 team at ARM to get corner cases of
mdct_forward. Will update with another patch
when issue in NE10 gets fixed.
Regards,
Vish
[1]:
2015 May 15
11
[RFC V3 0/8] Ne10 fft fixed and previous
Hi All,
Changes from RFC v2 [1]
armv7,armv8: Extend fixed fft NE10 optimizations to mdct
- Overflow issue fixed by Phil at ARM. Ne10 wip at [2]. Should be upstream soon.
- So, re-enabled using fixed fft for mdct_forward which was disabled in RFCv2
armv7,armv8: Optimize fixed point fft using NE10 library
- Thanks to Jonathan Lennox, fixed some build fixes on iOS and some copy-paste errors
Rest
2015 Apr 28
10
[RFC PATCH v1 0/8] Ne10 fft fixed and previous
Hello Timothy / Jean-Marc / opus-dev,
This patch series is follow up on work I posted on [1].
In addition to what was posted on [1], this patch series mainly
integrates Fixed point FFT implementations in NE10 library into opus.
You can view my opus wip code at [2].
Note that while I found some issues both with the NE10 library(fixed fft)
and with Linaro toolchain (armv8 intrinsics), the work
2003 Aug 22
3
PAE removal patch for testing
...-kernel pages */
addl $UPAGES*PAGE_SIZE,%esp /* bootstrap stack end location */
- xorl %eax,%eax /* mark end of frames */
+ xorl %eax,%eax /* mark end of frames */
movl %eax,%ebp
movl _proc0paddr,%eax
- movl %cr3,%esi
+ movl _IdlePTD, %esi
movl %esi,PCB_CR3(%eax)
testl $CPUID_PGE, R(_cpu_feature)
@@ -372,11 +367,11 @@
1:
movl physfree, %esi
- pushl %esi /* value of first for init386(first) */
- call _init386 /* wire 386 chip for unix operation */
+ pushl %esi /* value of first for init386(first) */
+ call _init386 /* wire 386 chip for unix operation */
popl %esi
- call _mi...
2015 Jan 20
6
[RFC PATCH v1 0/2] Encode optimize using libNE10
Hello opus-dev,
I've been cooking up this patchset to integrate NE10 library into opus.
Current patchset focuses on encode use case mainly effecting performance of
clt_mdct_forward() and opus_fft() (for float only)
Glad to report the following on Encode use case:
(Measured on my Beaglebone Black Cortex-A8 board)
- Performance improvement for encode use case ~= 12.34% (Based on time -p
2009 Feb 22
2
The machdep.hyperthreading_allowed & ULE weirdness in 7.1
Hi Jeff,
I have a single-CPU system with P4 HTT-enabled processor
(7.1-RELEASE-p3), kernel compiled with SCHED_ULE.
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