search for: cpu2

https://bugs.freedesktop.org/show_bug.cgi?id=98709 Bug ID: 98709 Summary: [NV50] clocksource: timekeeping watchdog on CPU2: Marking clocksource 'tsc' as unstable because the skew is too large Product: Mesa Version: 12.0 Hardware: x86-64 (AMD64) OS: Linux (All) Status: NEW Severity: normal Prio...

I have updated my laptop to 7.4 CR this morning and found that there have been a lot of logs on two fronts for the first time. 1. The kernel has indicated overheating: [Sat Aug 26 08:58:21 2017] CPU2: Core temperature above threshold, cpu clock throttled (total events = 1) [Sat Aug 26 08:58:21 2017] CPU4: Package temperature above threshold, cpu clock throttled (total events = 1) [Sat Aug 26 08:58:21 2017] CPU6: Core temperature above threshold, cpu clock throttled (total events = 1) [Sat Aug 2...

...above) still sucks due to lock holder preemption, but at least the suckage doesn't queue. Because with queueing you not only have to worry about the lock holder getting preemption, but also the waiter(s). Take the situation of 3 (v)CPUs where cpu0 holds the lock but is preempted. cpu1 queues, cpu2 queues. Then cpu1 gets preempted, after which cpu0 gets back online. The simple test-and-set lock will now let cpu2 acquire. Your queue however will just sit there spinning, waiting for cpu1 to come back from holiday. I think you're way over engineering this. Just do the simple test-and-set l...

...above) still sucks due to lock holder preemption, but at least the suckage doesn't queue. Because with queueing you not only have to worry about the lock holder getting preemption, but also the waiter(s). Take the situation of 3 (v)CPUs where cpu0 holds the lock but is preempted. cpu1 queues, cpu2 queues. Then cpu1 gets preempted, after which cpu0 gets back online. The simple test-and-set lock will now let cpu2 acquire. Your queue however will just sit there spinning, waiting for cpu1 to come back from holiday. I think you're way over engineering this. Just do the simple test-and-set l...

...nd one shared vector for all queues in below qemu cmdline, when the num-queues for virtio-blk is more than the number of possible cpus: qemu: "-smp 4" while "-device virtio-blk-pci,drive=drive-0,id=virtblk0,num-queues=6" # cat /proc/interrupts CPU0 CPU1 CPU2 CPU3 ... ... 24: 0 0 0 0 PCI-MSI 65536-edge virtio0-config 25: 0 0 0 59 PCI-MSI 65537-edge virtio0-virtqueues ... ... However, when num-queues is the same as number of possible cpus: qemu: "-smp 4&q...

...nd one shared vector for all queues in below qemu cmdline, when the num-queues for virtio-blk is more than the number of possible cpus: qemu: "-smp 4" while "-device virtio-blk-pci,drive=drive-0,id=virtblk0,num-queues=6" # cat /proc/interrupts CPU0 CPU1 CPU2 CPU3 ... ... 24: 0 0 0 0 PCI-MSI 65536-edge virtio0-config 25: 0 0 0 59 PCI-MSI 65537-edge virtio0-virtqueues ... ... However, when num-queues is the same as number of possible cpus: qemu: "-smp 4&q...

...ow it). > > I will revisit my WRC Linux example. And yes, creating litmus tests > that use non-fake dependencies is still a bit of an undertaking. :-/ > I am sure that it will seem more natural with time and experience... Hmmm... You are quite right, I did do WWC. I need to change cpu2()'s last access from a store to a load to get WRC. Plus the levels of indirection definitely didn't match up, did they? struct foo { struct foo *next; }; struct foo a; struct foo b; struct foo c = { &a }; struct foo d = { &b }; struct foo x = { &c }; struct foo y = {...

...ow it). > > I will revisit my WRC Linux example. And yes, creating litmus tests > that use non-fake dependencies is still a bit of an undertaking. :-/ > I am sure that it will seem more natural with time and experience... Hmmm... You are quite right, I did do WWC. I need to change cpu2()'s last access from a store to a load to get WRC. Plus the levels of indirection definitely didn't match up, did they? struct foo { struct foo *next; }; struct foo a; struct foo b; struct foo c = { &a }; struct foo d = { &b }; struct foo x = { &c }; struct foo y = {...

...2017 12:11 by smooge at gmail.com: > > > > I have updated my laptop to 7.4 CR this morning and found that there > > have been a lot of logs on two fronts for the first time. > > > > 1. The kernel has indicated overheating: > > > > [Sat Aug 26 08:58:21 2017] CPU2: Core temperature above threshold, cpu > > clock throttled (total events = 1) > > [Sat Aug 26 08:58:21 2017] CPU4: Package temperature above threshold, > > cpu clock throttled (total events = 1) > > [Sat Aug 26 08:58:21 2017] CPU6: Core temperature above threshold, cpu >...

.... Aug 2017 12:11 by smooge at gmail.com: > > >> I have updated my laptop to 7.4 CR this morning and found that there >> have been a lot of logs on two fronts for the first time. >> >> 1. The kernel has indicated overheating: >> >> [Sat Aug 26 08:58:21 2017] CPU2: Core temperature above threshold, cpu >> clock throttled (total events = 1) >> [Sat Aug 26 08:58:21 2017] CPU4: Package temperature above threshold, >> cpu clock throttled (total events = 1) >> [Sat Aug 26 08:58:21 2017] CPU6: Core temperature above threshold, cpu >>...

...Linux example. And yes, creating litmus tests > > > that use non-fake dependencies is still a bit of an undertaking. :-/ > > > I am sure that it will seem more natural with time and experience... > > > > Hmmm... You are quite right, I did do WWC. I need to change cpu2()'s > > last access from a store to a load to get WRC. Plus the levels of > > indirection definitely didn't match up, did they? > > Nope, it was pretty baffling! "It is a service that I provide." ;-) > > struct foo { > > struct foo *next; >...

...Linux example. And yes, creating litmus tests > > > that use non-fake dependencies is still a bit of an undertaking. :-/ > > > I am sure that it will seem more natural with time and experience... > > > > Hmmm... You are quite right, I did do WWC. I need to change cpu2()'s > > last access from a store to a load to get WRC. Plus the levels of > > indirection definitely didn't match up, did they? > > Nope, it was pretty baffling! "It is a service that I provide." ;-) > > struct foo { > > struct foo *next; >...

...546630 1713 irq19: atapci0 5181 16 irq23: ehci0 ehci1 1049 3 cpu0: timer 637069 1997 irq256: em0 1557 4 cpu3: timer 636939 1996 cpu2: timer 636939 1996 cpu1: timer 636938 1996 Total 3115193 9765 Data for debug: [2.0.3-RELEASE] [root at pfsense.localdomain] / root (1): sysctl hw.em hw.em.eee_setting: 0 hw.em.rx_process_limit: 100 hw.em.enab...

...>and that voices point me to Documentation/memory-barriers.txt section "DATA > >>DEPENDENCY BARRIERS" examples which require SYNC_RMB between loading > >>address/index and using that for loading data based on that address or index > >>for shared data (look on CPU2 pseudo-code): > >>>To deal with this, a data dependency barrier or better must be inserted > >>>between the address load and the data load: > >>> > >>> CPU 1 CPU 2 > >>> =============== =============== &...

...future >> and that voices point me to Documentation/memory-barriers.txt section "DATA >> DEPENDENCY BARRIERS" examples which require SYNC_RMB between loading >> address/index and using that for loading data based on that address or index >> for shared data (look on CPU2 pseudo-code): >>> To deal with this, a data dependency barrier or better must be inserted >>> between the address load and the data load: >>> >>> CPU 1 CPU 2 >>> =============== =============== >>> {...

...future >> and that voices point me to Documentation/memory-barriers.txt section "DATA >> DEPENDENCY BARRIERS" examples which require SYNC_RMB between loading >> address/index and using that for loading data based on that address or index >> for shared data (look on CPU2 pseudo-code): >>> To deal with this, a data dependency barrier or better must be inserted >>> between the address load and the data load: >>> >>> CPU 1 CPU 2 >>> =============== =============== >>> {...

...om guest, then host. top - 14:12:35 up 12 min, 1 user, load average: 2.76, 2.28, 1.24 Tasks: 169 total, 1 running, 168 sleeping, 0 stopped, 0 zombie Cpu0 : 0.3%us, 0.7%sy, 0.0%ni, 0.0%id, 99.0%wa, 0.0%hi, 0.0%si, Cpu1 : 0.0%us, 0.0%sy, 0.0%ni,100.0%id, 0.0%wa, 0.0%hi, 0.0%si, Cpu2 : 0.0%us, 0.0%sy, 0.0%ni,100.0%id, 0.0%wa, 0.0%hi, 0.0%si, Cpu3 : 0.0%us, 0.3%sy, 0.0%ni, 99.7%id, 0.0%wa, 0.0%hi, 0.0%si, top - 14:14:28 up 15 min, 1 user, load average: 0.79, 0.84, 0.50 Tasks: 238 total, 2 running, 236 sleeping, 0 stopped, 0 zombie Cpu0 : 5.7%us, 1.0%sy,...

...Than The People In Charge. 26. Aug 2017 12:11 by smooge at gmail.com: > I have updated my laptop to 7.4 CR this morning and found that there > have been a lot of logs on two fronts for the first time. > > 1. The kernel has indicated overheating: > > [Sat Aug 26 08:58:21 2017] CPU2: Core temperature above threshold, cpu > clock throttled (total events = 1) > [Sat Aug 26 08:58:21 2017] CPU4: Package temperature above threshold, > cpu clock throttled (total events = 1) > [Sat Aug 26 08:58:21 2017] CPU6: Core temperature above threshold, cpu > clock throttled (tot...

...ri_net channel => 1-15,17-31 context = default group = 63 /etc/dahdi/system.conf: # Span 1: TE4/0/1 "T4XXP (PCI) Card 0 Span 1" (MASTER) span=1,0,0,ccs,hdb3,crc4 # termtype: te bchan=1-15,17-31 dchan=16 echocanceller=mg2,1-15,17-31 /proc/interrupts: CPU0 CPU1 CPU2 CPU3 0: 462 313 432 0 IO-APIC-edge timer 1: 3 5 5 3 IO-APIC-edge i8042 8: 32 31 32 34 IO-APIC-edge rtc0 9: 0 0 0 0 IO-APIC-f...

...tion, but at least the suckage doesn't queue. Because with > >queueing you not only have to worry about the lock holder getting > >preemption, but also the waiter(s). > > > >Take the situation of 3 (v)CPUs where cpu0 holds the lock but is > >preempted. cpu1 queues, cpu2 queues. Then cpu1 gets preempted, after > >which cpu0 gets back online. > > > >The simple test-and-set lock will now let cpu2 acquire. Your queue > >however will just sit there spinning, waiting for cpu1 to come back from > >holiday. > > > >I think you'...