search for: cpu0

Hello, Do you know what this means : kvm: 2918: cpu0 unhandled rdmsr: 0x345 kvm: 2918: cpu0 unhandled rdmsr: 0x1c9 kvm: 2918: cpu0 unhandled rdmsr: 0x1a6 kvm: 2918: cpu0 unhandled rdmsr: 0x1a7 kvm: 2918: cpu0 unhandled rdmsr: 0x3f6 tap110i0: no IPv6 routers present kvm: 2952: cpu0 unhandled rdmsr: 0x345 kvm: 2952: cpu0 unhandled rdmsr: 0x1c9 kvm: 295...

I am having problems with save/restore under 3.3.1 in the GPLPV drivers. I call hvm_shutdown(xpdd, SHUTDOWN_suspend), but as soon as I lower IRQL (enabling interrupts), qemu goes to 100% CPU and the DomU load goes right up too. Xentrace is showing a whole lot of this going on: CPU0 200130258143212 (+ 770) hypercall [ rip = 0x000000008020632a, eax = 0xffffffff ] CPU0 200130258151107 (+ 7895) hypercall [ rip = 0x00000000802062eb, eax = 0xffffffff ] CPU0 200130258156293 (+ 5186) hypercall [ rip = 0x00000000802062eb, eax = 0xffffffff ] CPU0 200130258161233 (+...

On Wed, Jan 16, 2019 at 09:42:21AM +0100, Christophe Dumont wrote: > Hello, > > Do you know what this means : > > kvm: 2918: cpu0 unhandled rdmsr: 0x345 > kvm: 2918: cpu0 unhandled rdmsr: 0x1c9 > kvm: 2918: cpu0 unhandled rdmsr: 0x1a6 > kvm: 2918: cpu0 unhandled rdmsr: 0x1a7 > kvm: 2918: cpu0 unhandled rdmsr: 0x3f6 > tap110i0: no IPv6 routers present > kvm: 2952: cpu0 unhandled rdmsr: 0x345 > kvm: 2952: c...

...M01=00000000000000000000000000000000 XMM02=00000000000000000000000000000000 XMM03=00000000000000000000000000000000 XMM04=00000000000000000000000000000000 XMM05=00000000000000000000000000000000 XMM06=00000000000000000000000000000000 XMM07=00000000000000000000000000000000 bochsout.txt: 00540593725e[CPU0 ] write_virtual_checks(): no write access to seg 00540593814e[CPU0 ] fetch_raw_descriptor: GDT: index (3a27)744 > limit (2f) 00540593903e[CPU0 ] fetch_raw_descriptor: LDTR.valid=0 ... 00540644544e[CPU0 ] fetch_raw_descriptor: LDTR.valid=0 00540644633e[CPU0 ] fetch_raw_descriptor: GDT: index (313...

Hi, I am writing an llvm backend tutorial through my learning process of llvm backend study and implementation. Web as follows, http://jonathan2251.github.com/lbd/index.html It include 10,000 lines of sources code for 1. Step by step, create an llvm backend for the Cpu0 which beginning from a CPU design for school teaching purpose in system programming. 2. ELF linker for Cpu0 which extended from lld. 3. elf2hex extended from llvm-objump. 4. Cpu0 verilog source code. With these code, reader can run the generated code from Cpu0 llvm backend compiler, linker and elf...

Hi All! I have a some problem: On the my motherboard Intel DG45NB with Processor Box Intel Core 2 Duo E6300 , i see in the dmesg(log file): dmesg | grep CPU0 APIC error on CPU0: 00(60) or the sometime: dmesg | grep CPU1 APIC error on CPU1: 00(60) How can I fix this problem??? This Bug is my motherboard or the kernel??? The system good working is uptime... Without reboot... Other error in the log file - not found. My kernel 2.6.18-164.6.1.el5 My system...

...l6_2.6.x86_64 libvirt-python-0.9.4-23.el6_2.6.x86_64 qemu-img-0.12.1.2-2.209.el6_2.4.x86_64 qemu-kvm-0.12.1.2-2.209.el6_2.4.x86_64 This message in /var/log/messages precedes every crash: [root at shackleton-eth0 log]# grep kvm /var/log/messages Mar 19 09:09:25 shackleton-eth0 kernel: kvm: 2889: cpu0 unhandled wrmsr: 0x198 data 0 Mar 19 09:15:48 shackleton-eth0 kernel: kvm: 2889: cpu0 unhandled wrmsr: 0x198 data 0 Mar 19 09:25:51 shackleton-eth0 kernel: kvm: 2889: cpu0 unhandled wrmsr: 0x198 data 0 Mar 19 11:21:27 shackleton-eth0 kernel: kvm: 2889: cpu0 unhandled wrmsr: 0x198 data 0 Mar 19 12:0...

Posted this to xen-users back in Oct (http://www.gossamer-threads.com/lists/xen/users/186768), but just confirmed that I''m still seeing this behavior on 4.1. Polling the UCE-SNMP-MIB::ssCpuRawIdle counter results in a total that''s double the actual number of cpu''s on the system, so for example: nms ~ # snmpwalk -v 2c -c ''XXX'' xen1

...t; I am writing an llvm backend tutorial through my learning process of llvm > backend study and implementation. Web as follows, > > http://jonathan2251.github.com/lbd/index.html > > It include 10,000 lines of sources code for > > 1. Step by step, create an llvm backend for the Cpu0 which beginning from > a CPU design for school teaching purpose in system programming. > 2. ELF linker for Cpu0 which extended from lld. > 3. elf2hex extended from llvm-objump. > 4. Cpu0 verilog source code. > > With these code, reader can run the generated code from Cpu0 llvm bac...

...it? Im running Asterisk on that machine. 40 is Received Illegal Vector 20 is Send Illegal Vector 60 means you're getting both errors at the same time. Basically it means that the APIC bus messages are malformed. The cause can be hardware or software, it's difficult to tell. APIC error on CPU0: 60(60) APIC error on CPU0: 60(60) APIC error on CPU0: 60(60) cat /proc/cpuinfo shows: processor : 1 vendor_id : GenuineIntel cpu family : 15 model : 4 model name : Intel(R) Pentium(R) D CPU 2.66GHz stepping : 7 cpu MHz : 2666.770 cache...

...it? Im running Asterisk on that machine. 40 is Received Illegal Vector 20 is Send Illegal Vector 60 means you're getting both errors at the same time. Basically it means that the APIC bus messages are malformed. The cause can be hardware or software, it's difficult to tell. APIC error on CPU0: 60(60) APIC error on CPU0: 60(60) APIC error on CPU0: 60(60) cat /proc/cpuinfo shows: processor : 1 vendor_id : GenuineIntel cpu family : 15 model : 4 model name : Intel(R) Pentium(R) D CPU 2.66GHz stepping : 7 cpu MHz : 2666.770 cache...

Hi Konrad, I just tried to boot a 3.8.0-rc0 kernel (last commit: 7313264b899bbf3988841296265a6e0e8a7b6521) as dom0 on my machine with current xen-unstable. The boot stalls: [ 0.000000] ACPI: PM-Timer IO Port: 0x808 [ 0.000000] ACPI: Local APIC address 0xfee00000 [ 0.000000] ACPI: LAPIC (acpi_id[0x01] lapic_id[0x00] enabled) [ 0.000000] ACPI: LAPIC (acpi_id[0x02] lapic_id[0x01]

...t; > I am writing an llvm backend tutorial through my learning process of llvm backend study and implementation. Web as follows, > > http://jonathan2251.github.com/lbd/index.html > > It include 10,000 lines of sources code for > > 1. Step by step, create an llvm backend for the Cpu0 which beginning from a CPU design for school teaching purpose in system programming. > 2. ELF linker for Cpu0 which extended from lld. > 3. elf2hex extended from llvm-objump. > 4. Cpu0 verilog source code. > > With these code, reader can run the generated code from Cpu0 llvm backend...

.../* Shouldn''t return */ + while(1); + } + + if (!freeze_domains()) + { + pmprintk(XENLOG_ERR, "Failed to freeze domains\n"); + return -EINVAL; + } + + if (current->processor == 0) { + int ret; + + pmprintk(XENLOG_INFO, "vcpu0 on cpu0, sleep direclty\n"); + ret = enter_state(acpi_sinfo.sleep_state); + thaw_domains(); + return ret; + } + + pmprintk(XENLOG_INFO, "vcpu0 on cpu%d, pause self and notify cpu0\n", + current->processor); + cpu_raise_softirq(0, PM_SOFTIRQ); +...

...n2=-1 (XEN) ..MP-BIOS bug: 8254 timer not connected to IO-APIC (XEN) ...trying to set up timer (IRQ0) through the 8259A ... failed. (XEN) ...trying to set up timer as Virtual Wire IRQ... works. (XEN) Platform timer is 3.579MHz ACPI PM Timer EN) Allocated console ring of 16 KiB. (XEN) APIC error on CPU0: 00(04) (XEN) APIC error on CPU0: 04(04) (XEN) APIC error on CPU0: 04(04) (XEN) APIC error on CPU0: 04(04) (XEN) APIC error on CPU0: 04(04) (XEN) APIC error on CPU0: 04(04) Best regards, Kan _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com h...

What could be the reason for /sys/devices/system/cpu/cpu0/cpufreq non-existing? The cpu supports EIST. My guess is this may not be available because of cpu power/performance settings in the BIOS, but I can't take down production machines to play with this. Any ideas? The HW is Dell PER 5xx/7xx series. # cpupower frequency-info analyzing CPU 0:...

I would know if there is anyone that can solve my problem: I have an error panic on CPU0 and it tell me that it''snot able to load dom0 and than reboot it thx , all _______________________________________________ Xen-users mailing list Xen-users@lists.xen.org http://lists.xen.org/xen-users

Sean, I refresh my book "Write a llvm backend tutorial for cpu0 version 3" in https://www.dropbox.com/sh/2pkh1fewlq2zag9/r9n4gnqPm7 Best regards Jonathan

On 11/20/2017 08:42 PM, Jens Axboe wrote: > On 11/20/2017 12:29 PM, Christian Borntraeger wrote: >> >> >> On 11/20/2017 08:20 PM, Bart Van Assche wrote: >>> On Fri, 2017-11-17 at 15:42 +0100, Christian Borntraeger wrote: >>>> This is >>>> >>>> b7a71e66d (Jens Axboe 2017-08-01 09:28:24 -0600 1141) * are mapped to

On 11/20/2017 08:42 PM, Jens Axboe wrote: > On 11/20/2017 12:29 PM, Christian Borntraeger wrote: >> >> >> On 11/20/2017 08:20 PM, Bart Van Assche wrote: >>> On Fri, 2017-11-17 at 15:42 +0100, Christian Borntraeger wrote: >>>> This is >>>> >>>> b7a71e66d (Jens Axboe 2017-08-01 09:28:24 -0600 1141) * are mapped to