Displaying 6 results from an estimated 6 matches for "cpidx".
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pidx
2008 Sep 15
0
[LLVMdev] Alignment of constant loads
...the getLoad/getExtLoad calls.
>
> If you move the handling of Alignment==0 out of ScheduleDAGEmit.cpp
> and into SelectionDAG::getConstantPool, you can then have legalize
> read the alignment from the node, instead of making its own
> decision:
> cast<ConstantPoolSDNode>(CPIdx)->getAlignment()
>
>
I followed your suggestion but I've come across a bit of a snag. If you
get the alignment in LegalizeDAG using:
SDValue CPIdx = DAG.getConstantPool(LLVMC, TLI.getPointerTy());
unsigned Alignment = cast<ConstantPoolSDNode>(CPIdx)->getAlignment();
The...
2008 Sep 13
2
[LLVMdev] Alignment of constant loads
...d
add alignment parameters to the getLoad/getExtLoad calls.
If you move the handling of Alignment==0 out of ScheduleDAGEmit.cpp
and into SelectionDAG::getConstantPool, you can then have legalize
read the alignment from the node, instead of making its own
decision:
cast<ConstantPoolSDNode>(CPIdx)->getAlignment()
Dan
2017 Jul 22
4
[RFC] Add IR level interprocedural outliner for code size.
Hi Andrey,
Questions and feedback are very much welcome.
- The explanation as to why the improvements can vary between the IR and
MIR outliner mainly boil down to the level of abstraction that each are
working at. The MIR level has very accurate heuristics and is effectively
the last post ISel target independent code gen pass. The IR outliner on the
other hand has more estimation in the cost
2009 May 21
0
[LLVMdev] [PATCH] Add new phase to legalization to handle vector operations
On Wed, May 20, 2009 at 4:55 PM, Dan Gohman <gohman at apple.com> wrote:
> Can you explain why you chose the approach of using a new pass?
> I pictured removing LegalizeDAG's type legalization code would
> mostly consist of finding all the places that use TLI.getTypeAction
> and just deleting code for handling its Expand and Promote. Are you
> anticipating something more
2009 May 20
2
[LLVMdev] [PATCH] Add new phase to legalization to handle vector operations
On May 20, 2009, at 1:34 PM, Eli Friedman wrote:
> On Wed, May 20, 2009 at 1:19 PM, Eli Friedman
> <eli.friedman at gmail.com> wrote:
>
>> Per subject, this patch adding an additional pass to handle vector
>>
>> operations; the idea is that this allows removing the code from
>>
>> LegalizeDAG that handles illegal types, which should be a significant
2009 May 21
2
[LLVMdev] [PATCH] Add new phase to legalization to handle vector operations
...- SDValue CstOffset = DAG.getNode(ISD::SELECT, dl, Zero.getValueType(),
- SignSet, Four, Zero);
- uint64_t FF = 0x5f800000ULL;
- if (TLI.isLittleEndian()) FF <<= 32;
- Constant *FudgeFactor = ConstantInt::get(Type::Int64Ty, FF);
-
- SDValue CPIdx = DAG.getConstantPool(FudgeFactor, TLI.getPointerTy());
- unsigned Alignment = cast<ConstantPoolSDNode>(CPIdx)->getAlignment();
- CPIdx = DAG.getNode(ISD::ADD, dl, TLI.getPointerTy(), CPIdx, CstOffset);
- Alignment = std::min(Alignment, 4u);
- SDValue FudgeInReg;
- if (DestT...