search for: coveredbysubreg

...Mips"; } class ARMReg<bits<4> num, string n, list<Register> subregs = []> : Register<n> { field bits<4> Num; let Namespace = "ARM"; let SubRegs = subregs; // All bits of ARM registers with sub-registers are covered by sub-registers. let CoveredBySubRegs = 1; } class ARMFReg<bits<6> num, string n> : Register<n> { field bits<6> Num; let Namespace = "ARM"; } class SparcReg<string n> : Register<n> { field bits<5> Num; let Namespace = "SP"; } Then subsequently, further der...

...to construct a register of size 65536 bit by combining 2 >>>>> registers of 32768 bits. both the 32768 bit registers are different so i >>>>> have to use the following method >>>>> >>>>> let SubRegIndices = [sub_32768bit, sub_32768bit_hi], CoveredBySubRegs >>>>> = 1 in >>>>> >>>>> but i am getting following error.. >>>>> >>>>> error:Ran out of lanemask bits to represent subregister >>>>> sub_32768bit_hi_then_sub_16384bit_hi_then_sub_32bit >>>>> &...

...; num, string n, list<Register> subregs = []> : > Register<n> { > field bits<4> Num; > let Namespace = "ARM"; > let SubRegs = subregs; > // All bits of ARM registers with sub-registers are covered by > sub-registers. > let CoveredBySubRegs = 1; > } > > class ARMFReg<bits<6> num, string n> : Register<n> { > field bits<6> Num; > let Namespace = "ARM"; > } > > class SparcReg<string n> : Register<n> { > field bits<5> Num; > let Names...

Hello, i am trying to construct a register of size 65536 bit by combining 2 registers of 32768 bits. both the 32768 bit registers are different so i have to use the following method let SubRegIndices = [sub_32768bit, sub_32768bit_hi], CoveredBySubRegs = 1 in but i am getting following error.. error:Ran out of lanemask bits to represent subregister sub_32768bit_hi_then_sub_16384bit_hi_then_sub_32bit now how to increase lanemask bits? what changes are required in IntrinsicEmitter.cpp file?? Please reply. -------------- next part -------------...

...2305 at gmail.com> wrote: > > Hello, > i am trying to construct a register of size 65536 bit by combining 2 > registers of 32768 bits. both the 32768 bit registers are different so i > have to use the following method > > let SubRegIndices = [sub_32768bit, sub_32768bit_hi], CoveredBySubRegs = 1 > in > > but i am getting following error.. > > error:Ran out of lanemask bits to represent subregister > sub_32768bit_hi_then_sub_16384bit_hi_then_sub_32bit > > now how to increase lanemask bits? what changes are required > in IntrinsicEmitter.cpp file?? > > P...

...u on llvm group. Could you please help me here to address this issue. i am trying to construct a register of size 65536 bit by combining 2 registers of 32768 bits. both the 32768 bit registers are different so i have to use the following method let SubRegIndices = [sub_32768bit, sub_32768bit_hi], CoveredBySubRegs = 1 in but i am getting following error.. error:Ran out of lanemask bits to represent subregister sub_32768bit_hi_then_sub_16384bit_hi_then_sub_8192bit_hi_then _sub_4096bit_hi_then_sub_2048bit_hi_then_sub_32bit_hi_then now how to increase lanemask bits? what changes are required?? Kindly help...

...dress this issue. >> >> i am trying to construct a register of size 65536 bit by combining 2 >> registers of 32768 bits. both the 32768 bit registers are different so i >> have to use the following method >> >> let SubRegIndices = [sub_32768bit, sub_32768bit_hi], CoveredBySubRegs = 1 >> in >> >> but i am getting following error.. >> >> error:Ran out of lanemask bits to represent subregister >> sub_32768bit_hi_then_sub_16384bit_hi_then_sub_8192bit_hi_ >> then_sub_4096bit_hi_then_sub_2048bit_hi_then_sub_32bit_hi_then >> >&gt...

...Hello, >>> i am trying to construct a register of size 65536 bit by combining 2 >>> registers of 32768 bits. both the 32768 bit registers are different so i >>> have to use the following method >>> >>> let SubRegIndices = [sub_32768bit, sub_32768bit_hi], CoveredBySubRegs = >>> 1 in >>> >>> but i am getting following error.. >>> >>> error:Ran out of lanemask bits to represent subregister >>> sub_32768bit_hi_then_sub_16384bit_hi_then_sub_32bit >>> >>> now how to increase lanemask bits? what chan...

...;bits<4> num, string n, list<Register> subregs = []> : > Register<n> { > field bits<4> Num; > let Namespace = "ARM"; > let SubRegs = subregs; > // All bits of ARM registers with sub-registers are covered by > sub-registers. > let CoveredBySubRegs = 1; > } You are right, the field is not used currently. Instead, we have large switch statements like getARMRegisterNumbering(). Actually, I think it might be useful to have TableGen handle the register encoding numbering, just like it does for DWARF register numbers. /jakob --------------...

i have loop index I. I want to increment it by 1. How to do this in registerinfo.td. I m trying following but getting error. let SubRegIndices = [sub_32bit, sub_32bit_hi], CoveredBySubRegs = 1 in { foreach I = 0-255 in { m=add(I,1); def R_#J#_REG64b_#I : R_P<"R_"#J#"_R64b_"#I, !shl(I,2), [!cast<R_P>("R_"#J#"_REG32b_"#I), !cast<R_PIM>("R_"#J#"_REG32b_"#m)]>; } } please help. how to increment I (add...

I have made changes in 3 files: LaneBitmask.h, codegenregisters.cpp and miparser.cpp. files are attached here. Now i am getting following errors. which means registerinfo.inc file is not generated successfully. /PIM/lib/Target/X86/MCTargetDesc/X86BaseInfo.h:733:24: error: no member named 'XMM8' in namespace 'llvm::X86' if ((RegNo >= X86::XMM8 && RegNo <=

...gt; i am trying to construct a register of size 65536 bit by combining 2 >>>> registers of 32768 bits. both the 32768 bit registers are different so i >>>> have to use the following method >>>> >>>> let SubRegIndices = [sub_32768bit, sub_32768bit_hi], CoveredBySubRegs = >>>> 1 in >>>> >>>> but i am getting following error.. >>>> >>>> error:Ran out of lanemask bits to represent subregister >>>> sub_32768bit_hi_then_sub_16384bit_hi_then_sub_8192bit_hi_the >>>> n_sub_4096bit_hi_the...

...gt; combining 2 registers of 32768 bits. both the 32768 bit >> registers are different so i have to use the following >> method >> >> let SubRegIndices = [sub_32768bit, sub_32768bit_hi], >> CoveredBySubRegs = 1 in >> >> but i am getting following error.. >> >> error:Ran out of lanemask bits to represent subregister >> sub_32768bit_hi_then_sub_16384bit_hi_then_sub_8192bit_hi_ >> then_sub_4096bit_hi_then_sub_2048bit_hi_...

...t;9, "b">; def CC : MC6809Reg<10, "cc">; def DP : MC6809Reg<11, "dp">; def A0 : MC6809Reg<12, "0">; def AE : MC6809Reg<14, "e">; def AF : MC6809Reg<15, "f">; let SubRegIndices = [sub_hi_byte, sub_lo_byte], CoveredBySubRegs = 1 in { def AD : MC6809RegWithSubregs<0, "d", [AA,AB], ["a","b"]>; def AW : MC6809RegWithSubregs<6, "w", [AE,AF], ["e","f"]>; } let SubRegIndices = [sub_hi_word, sub_lo_word], CoveredBySubRegs = 1 in { def AQ : MC6809R...

...masks '3', but the sub_16bit sub-register doesn't fully cover the /// sub_32bit sub-register. /// /// On the other hand, the ARM NEON lanes fully cover their registers: The /// dsub_0 sub-register is completely covered by the ssub_0 and ssub_1 lanes. /// This is related to the CoveredBySubRegs property on register definitions. /// /// This function returns a bit mask of lanes that completely cover their /// sub-registers. More precisely, given: /// /// Covering = getCoveringLanes(); /// MaskA = getSubRegIndexLaneMask(SubA); /// MaskB = getSubRegIndexLaneMask(SubB);...

The function TII::canCombineSubRegIndices has been gone for a while now, and I was wondering if there is a target-independent way of determining if a certain set of physical registers "adds up" to a larger register. For example, on X86, AL and AH together form AX. On Hexagon, R0 and R1 are D0. The context here is an attempt to coalesce multiple loads/stores into fewer loads/stores

...gt; > registers are different so i have to use the > > following > > method > > > > let SubRegIndices = [sub_32768bit, > > sub_32768bit_hi], > > CoveredBySubRegs = 1 in > > > > but i am getting following error.. > > > > error:Ran out of lanemask bits to represent > > subregister > > > > > sub_32768bit_hi_then_sub_16384bit_hi_then_sub_8192bit_hi_then_sub_...

Hi Borja, On Jul 10, 2012, at 6:26 PM, Borja Ferrer wrote: > Hello, > > I would like to know if there's a way of setting the callee-saved register list inside getCalleeSavedRegs() to make the PEI pass save/restore only one half of a register pair if the other half is not being used, instead of saving the whole pair. Here is an example of what I try to explain to make things more

Hello, I would like to know if there's a way of setting the callee-saved register list inside getCalleeSavedRegs() to make the PEI pass save/restore only one half of a register pair if the other half is not being used, instead of saving the whole pair. Here is an example of what I try to explain to make things more clear: Suppose this situation where we have a register file of 8bit regs, and