search for: counterinreg

...the PeelingScheduleExpander is much easier to reason about, IMHO). Cheers, James On Thu, 3 Sep 2020 at 20:41, Nagurne, James <j-nagurne at ti.com> wrote: > We have that behaves similarly to yours in this regard it seems. > Specifically, our target utilizes the HardwareLoop pass with CounterInReg > true, and then treats loops augmented by this pass as software pipeline > candidates. It seems PPC does this as well, but has CounterInReg false. Our > loop body ends up looking like this (in mildly simplified pseudocode): > > > > %body: > > * %indvar = P...

...MHO). > > > > Cheers, > > > > James > > > > On Thu, 3 Sep 2020 at 20:41, Nagurne, James <j-nagurne at ti.com> wrote: > > We have that behaves similarly to yours in this regard it seems. > Specifically, our target utilizes the HardwareLoop pass with CounterInReg > true, and then treats loops augmented by this pass as software pipeline > candidates. It seems PPC does this as well, but has CounterInReg false. Our > loop body ends up looking like this (in mildly simplified pseudocode): > > > > %body: > > * %indvar = P...

Hi James, Adding Hendrik, who has taken over ownership of the downstream code involved. I can also add background about the rationale, of that helps? It was added to ignore induction variable update code (scalar code) that is rewritten when we unroll / peel the prolog epilog anyway. Targets like Hexagon or PPC with dedicated loop control instructions for pipelined loops don't need this, but