search for: counteract

Hello, as far as I understood ext3 will more or less hog a machine when writing away the journal. A customer is having a slowdown every 5 minues for about 30 seconds, the machine becomes more or less unusable. This is an NFS server serving 300 Gigs spread over 2 NFS shares. I'm wondering what would be the best course of action: a) make the journal bigger? b) make the journal smaller?

Hi Hal, I see. So LSR could theoretically counteract undesirable Ind Var transformations but it's not implemented at the moment? I think I've managed to come up with a small reproducer that can also exhibit similar problem on x86, here it is: https://godbolt.org/z/_wxzut As you can see, when rewriteLoopExitValues is not disabled Clang gener...

...The modem is taken off-hook during initialization, and then # placed back on-hook when done to prevent glare. # ModemResetCmds: "ATH1\nAT+VCID=1" # enables CallID display ModemReadyCmds: ATH0 Class1AdaptRecvCmd: AT+FAR=1 Class1TMConnectDelay: 400 # counteract quick CONNECT response Class1RMQueryCmd: "!24,48,72,96" # V.17 fast-train recv doesn't work well CallIDPattern: "NMBR=" CallIDPattern: "NAME=" CallIDPattern: "ANID=" CallIDPattern: "NDID=" # Uncomment...

...optimizations, requiring a target specific opt pass? Is this > simply an optimization pass that hasn't been implemented yet, but is a good > idea? The later. On targets with few registers, LICM can be very bad. Our plan is to implement rematerialization in the register allocator to counteract this. In any case, I think that LICM should definitely be done, and targets can choose to use it or not based on their register file, before remat is done. -Chris -- http://nondot.org/sabre/ http://llvm.org/

...age, with units of "volts", then I'm suddenly also inheriting an exponent of 7? So to represent 120 volts, I'd actually have to send the value 1200000000, so that on the NUT side it would apply a -7 exponent to get it to come out as 120? I know I could add a -7 exponent to "counteract" the units exponent, but I'm trying to understand WHY it's like this, based on the table in 3.2.3 of the PDC HID doc. Why did they think that volts needs an exponent of 7 in them? I also noticed that current (amps) is listed as centiAmp, with a -2 unit exponent in the HID doc....howe...

Hi All, It seems to me that there is potential for doing some target independent loop invariant optimizations in the back end, but prior to instruction selection. For instance, I noticed that the loop invariant constant generated for a loop bounds check is still stuck inside the loop. Likewise constant address generated for globals accessed within a loop are generated on each iteration,

...is the current status of the residual echo suppressor in the preprocessor? I ask this because I have occasional problems with the AEC, in which it fails to cancel echo. I think the problems have to do with samples being dropped by the audio IO system, which is effectively impossible to detect and counteract reliably. A colleague recommended using an echo suppression technique (which he meant as synonymous with "nonlinear processor" and "loss control"). I wouldn't want the program to do anything drastic unless it knows that cancellation is not working. I'll probably just t...

...32 %0, %1 > ---- > In this example, the (store (load)) pair -- the first two lines -- will be > matched by isel as a MOVmm. This will be problematic for the add though, > since the load SDNode will be gone, making that part of the DAG no longer of > the form (add (load) (load)). To counteract this, I would create 2 load > SDNodes so that both of these patterns can be satisfied. Does this make > sense? > -Joe > > > > > On Sat, Dec 1, 2012 at 11:44 PM, Triple Yang <triple.yang at gmail.com> wrote: >> >> Hi, Joe. >> >> I am sorry I did...

Counteract incorrect use of the "deprecated" attribute in ffmpeg headers. In particular, struct AVPaletteControl is deprecated, but it's used in a non-deprecated struct AVCodecContext (as found in Fedora's ffmpeg-devel-0.4.9-0.8.20070530.fc7.x86_64). Define attribute_deprecated to an empty...

...r, align 4 %add = add i32 %0, %1 ---- In this example, the (store (load)) pair -- the first two lines -- will be matched by isel as a MOVmm. This will be problematic for the add though, since the load SDNode will be gone, making that part of the DAG no longer of the form (add (load) (load)). To counteract this, I would create 2 load SDNodes so that both of these patterns can be satisfied. Does this make sense? -Joe On Sat, Dec 1, 2012 at 11:44 PM, Triple Yang <triple.yang at gmail.com> wrote: > Hi, Joe. > > I am sorry I did not catch your point. Can you provide more details? &gt...

Hi @all, I'm having trouble to realize my use case and hope somebody could help me. # Use case For a home lab I want to deploy several guest domains. These domains must not have a direct or NAT connection to the internet or my LAN. They should only be able to reach my LAN and the internet through a proxy. # What I've done I've created the following virtual switch in isolated

...In this example, the (store (load)) pair -- the first two lines -- will > be > > matched by isel as a MOVmm. This will be problematic for the add though, > > since the load SDNode will be gone, making that part of the DAG no > longer of > > the form (add (load) (load)). To counteract this, I would create 2 load > > SDNodes so that both of these patterns can be satisfied. Does this make > > sense? > > -Joe > > > > > > > > > > On Sat, Dec 1, 2012 at 11:44 PM, Triple Yang <triple.yang at gmail.com> > wrote: > >> &g...

...second LSHR for redwood/VLIW5 GPUs. Now, here is my question: Is the R600/store.ll test actually correct (I am not yet familiar enough with the R600 ISA to tell), or does the R600 backend rely on the fact that implicit defs kill the uses of registers, or is there a bug/.. in the R600 backend that counteracts the implicit-defs scheduling issue? And is removing the explicit use by an implicit def at an instruction a bug or a feature? If this is an actual bug in the ScheduleDAGInstrs implementation, I would like to adapt my patch so that it can be applied (i.e., include a fix for the store.ll test), al...

Hi, Joe. I am sorry I did not catch your point. Can you provide more details? Since SDValue/SDNode can be used multiple times, why would you want to create two identical objects instead of reference to the same one? 2012/12/2 Joseph Pusdesris <joe at pusdesris.com>: > Yes, changing parameters will create a new Node, but is there some way I can > force a new node with the same

...la.Malyutin at synopsys.com>; Finkel, Hal J. <hfinkel at anl.gov> Cc: llvm-dev at lists.llvm.org Subject: Re: [llvm-dev] How to best deal with undesirable Induction Variable Simplification? On 8/9/19 8:27 AM, Danila Malyutin via llvm-dev wrote: Hi Hal, I see. So LSR could theoretically counteract undesirable Ind Var transformations but it's not implemented at the moment? I think I've managed to come up with a small reproducer that can also exhibit similar problem on x86, here it is: https://godbolt.org/z/_wxzut<https://urldefense.proofpoint.com/v2/url?u=https-3A__godbolt.org_z_-...

...residual echo suppressor in the > preprocessor? > > I ask this because I have occasional problems with the AEC, in which it > fails to cancel echo. I think the problems have to do with samples being > dropped by the audio IO system, which is effectively impossible to > detect and counteract reliably. > > A colleague recommended using an echo suppression technique (which he > meant as synonymous with "nonlinear processor" and "loss control"). I > wouldn't want the program to do anything drastic unless it knows that > cancellation is not working....

...le of a document exactly, you only get a 17% match. Has anyone seen a way to either curve the scores or make an exact phrase match get a higher score? I''ve looked over the similarity formula so I''m pretty sure I understand why it happens but I''m just looking for ways to counteract it/make the score make more sense to the user. Thanks, ej.finneran at gmail.com -- Posted via http://www.ruby-forum.com/.

Kevin Burton has posted about poor ranking in Lucene preferring shorter documents over longer ones[1]. A similar search in Xapian returns documents in the expected order: Performing query `Xapian::Query(foo)' 3 results found ID 3 99% [foo foo foo] ID 2 94% [foo foo] ID 1 80% [foo] Anyone know what Lucene is doing here? Their FAQ doesn't mention what weighting scheme they use, and I

...(...); > $tg->index_text($txt,$weight); The second parameter there is a WDF multiplier, which isn't really "weight". It depends on the weighting formula you're using (and the parameters set for it), but simply scaling up the WDF values for a whole document is likely to be counteracted by the corresponding increase in the document length (since that is SUM(WDF)). And the average document length will be fairly meaningless, which will probably make the relevance weighting less effective. Also, recency changes with passing time, so you'll either have to reindex regularly, or...

I was thinking about this some more: Is there a reason I can't just weight by some function of recency at indexing time? $weight = get_weight_based_on_recency(...); $tg->index_text($txt,$weight); If I wanted to allow the user the option of searching either in recency-weighted mode or not, I could index each document into 2 different databases, one with and one without. This avoids