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Dear all I am a PhD student of Computer Scince at Simon Fraser University ( http://www.cs.sfu.ca) interested in applying to GSoC. My PhD is focused on theoretical computer science, but since Sep. 2008 I have started working on Software projects again. Currently I am working in COSTAR lab ( http://costar.sfu.ca/) on a high performance regular expression engine based on Parallel bit streams technology. A considerable part of this project is optimal register allocation and I have got familiar with the literature during my current project. Before my PhD I have worked on various pro...

...ese instructions shuffle bits within a 64-bit word, either gathering all selected bits to the beginning (pext) or scattering some initial bits throughout (pdep). A natural model for this is to use shufflevector on v32i1 and v64i1 vectors. We've got some preliminary notes here: http://parabix.costar.sfu.ca/wiki/BitShuffle Since we're quite new at this, I have some questions about strategy. (1) First, it seems that legalizing v32i1 and v64i1 types for x86 would make sense. This will allow us to retain the shufflemasks involving these vector types into code generation. (2) To legalize...

Hi everyone. After lurking for a while, this is my first post to the list. I am working with some graduate students on the general topic of compiler support for SIMD programming and specific projects related to LLVM and my own Parabix technology (parabix.costar.sfu.ca). Right now we have a few course projects on the go and already a question arising out of one of them (SSE2 Hoisting). We're not sure how much has been tried before, or even makes sense, but we're eager to learn. Briefly the projects are: SSE2 Hoisting: translating programs that d...

...> > I am a PhD student of Computer Scince at Simon Fraser University (http://www.cs.sfu.ca > ) interested in applying to GSoC. My PhD is focused on theoretical > computer science, but since Sep. 2008 I have started working on > Software projects again. Currently I am working in COSTAR lab (http://costar.sfu.ca/ > ) on a high performance regular expression engine based on Parallel > bit streams technology. A considerable part of this project is > optimal register allocation and I have got familiar with the > literature during my current project. Before my PhD I...

...r all > > I am a PhD student of Computer Scince at Simon Fraser University ( > http://www.cs.sfu.ca) interested in applying to GSoC. My PhD is focused on > theoretical computer science, but since Sep. 2008 I have started working on > Software projects again. Currently I am working in COSTAR lab ( > http://costar.sfu.ca/) on a high performance regular expression engine > based on Parallel bit streams technology. A considerable part of this > project is optimal register allocation and I have got familiar with the > literature during my current project. Before my PhD I have w...

Buenas tardes amigos, De nuevo por aqui con un incoveniente, tengo el siguiente arreglo: > MuestraS [1] 1 0 0 0 1 0 1 1 1 1 1 0 Deseo realizar todas las permutaciones posibles para luego tomar una muestra aleatoria pequeña, esto lo debo hacer varias veces incrementando el largo del arreglo "MuestraS". El inconveniente esta en que al hacer las permutaciones con este arreglo de 12

Dear all I am a PhD student of Computer Scince at Simon Fraser University ( http://www.cs.sfu.ca) interested in applying to GSoC. My PhD is focused on theoretical computer science, but since Sep. 2008 I have started working on Software projects again. Currently I am working in COSTAR lab on a high performance regular expression engine based on Parallel bit streams technology. A considerable part of this project is optimal register allocation and I have got familiar with the literature during my current project. Before my PhD I have worked on various projects including distribut...