Displaying 2 results from an estimated 2 matches for "cortexa8model".
2020 Sep 23
2
Incorrect Cortex-R4/R4F/R5 ProcessorModel in ARM.td
In ARM.td, I see that the ProcessorModel for cortex-r4, cortex-r4f, and cortex-r5 (as well as r7 and r8) is based on "CortexA8Model", which seems incorrect. When this was added in 2015, there were also comments associated with this configuration, such as "// FIXME: R5 has currently the same ProcessorModel as A8" (later removed). The processor model for Cortex-r52 appears to be correct and corresponds to an asso...
2013 Apr 30
1
[LLVMdev] Instruction Scheduling - migration from v3.1 to v3.2
...unsigned UseIdx) const;
virtual unsigned TargetInstrInfo::getInstrLatency(const InstrItineraryData *ItinData,
const MachineInstr *MI,
unsigned *PredCost = 0) const;
Example:
def CortexA8Model : SchedMachineModel {
...
let Itineraries = CortexA8Itineraries;
}
If you don't actually have any itineraries defined in you target's Schedule.td files, you need to define some dummy itinerary with at least one entry. Something like this may work (I haven't tried it).
def IIC_Def...