search for: cormack

Displaying 20 results from an estimated 33 matches for "cormack".

2012 Mar 12
1
[LLVMdev] LLI Segfaulting
...Also, what would happen when the function returns, wouldn't the new array allocation portion go out of scope, as it's allocated on the function's stack frame? Thanks, Fraser Gavin Harrison-2 wrote: > > Yes, that is what I mean. :-) > On Mar 12, 2012 11:02 AM, "Fraser Cormack" <frasercrmck at gmail.com> wrote: > >> >> Hi Gavin, >> >> Do you mean something along the lines of having my array struct as { i32, >> i32* } and then indexing it with a gep and allocating the appropriate >> memory >> when I learn of it? &gt...
2012 Mar 12
2
[LLVMdev] LLI Segfaulting
...I learn of it? Thanks, Fraser Gavin Harrison-2 wrote: > > Hi Fraser, > > Is there anything preventing you from using a pointer for the second part > of the structure and allocating memory for it later? > > Thanks, > Gavin > > On Mar 12, 2012, at 10:35 AM, Fraser Cormack wrote: > >> >> Hi Duncan, >> >> >> Duncan Sands wrote: >>> >>> Hi Fraser, it looks to me like you are smashing the stack. >>> >>>> define void @main() nounwind { >>>> allocas: >>>> %0 = alloca {...
2012 Mar 12
0
[LLVMdev] LLI Segfaulting
Yes, that is what I mean. :-) On Mar 12, 2012 11:02 AM, "Fraser Cormack" <frasercrmck at gmail.com> wrote: > > Hi Gavin, > > Do you mean something along the lines of having my array struct as { i32, > i32* } and then indexing it with a gep and allocating the appropriate > memory > when I learn of it? > > Thanks, > Fraser > &...
2013 May 09
2
[LLVMdev] Scheduling with RAW hazards
...cognizer, which is effectively disabled, so I changed it to use the ScoreboardHazardRecognizer instead. I'm also still using the SelectionDAG scheduler, but will need to change to the MI scheduler at some point, to keep up with trunk. Should either of these help? Thanks, Fraser -- Fraser Cormack Compiler Developer Codeplay Software Ltd 45 York Place, Edinburgh, EH1 3HP Tel: 0131 466 0503 Fax: 0131 557 6600 Website: http://www.codeplay.com Twitter: https://twitter.com/codeplaysoft This email and any attachments may contain confidential and /or privileged information and is for use by the a...
2013 May 09
0
[LLVMdev] Scheduling with RAW hazards
On May 9, 2013, at 4:02 AM, Fraser Cormack <fraser at codeplay.com> wrote: > I have an instruction that takes no operands, and produces two results, in two consecutive cycles. > > I tried both of the following to my Schedule.td file: > > InstrItinData<IIMyInstr, [InstrStage<2, [FuncU]>], [1, 2]>, > I...
2013 May 13
1
[LLVMdev] Scheduling with RAW hazards
On 09/05/2013 18:25, Andrew Trick wrote: > > On May 9, 2013, at 4:02 AM, Fraser Cormack <fraser at codeplay.com > <mailto:fraser at codeplay.com>> wrote: > >> I have an instruction that takes no operands, and produces two >> results, in two consecutive cycles. >> >> I tried both of the following to my Schedule.td file: >> >> Inst...
2012 Mar 12
0
[LLVMdev] LLI Segfaulting
Hi Fraser, Is there anything preventing you from using a pointer for the second part of the structure and allocating memory for it later? Thanks, Gavin On Mar 12, 2012, at 10:35 AM, Fraser Cormack wrote: > > Hi Duncan, > > > Duncan Sands wrote: >> >> Hi Fraser, it looks to me like you are smashing the stack. >> >>> define void @main() nounwind { >>> allocas: >>> %0 = alloca { i32, [0 x i32] }, align 8 >> >> ^ th...
2020 Jul 14
2
[Beginner] Understanding Tablegen language
...in the following: LLVM backend development by example (RISC-V) 2018 LLVM Developers’ Meeting; Alex Bradbury https://www.youtube.com/watch?v=AFaIP-dF-RA 2014 - Building an LLVM Backend - LLVM Developer's Meeting https://llvm.org/devmtg/2014-10/#tutorial1 https://llvm.org/devmtg/2014-10/Slides/Cormack-BuildingAnLLVMBackend.pdf https://llvm.org/devmtg/2014-04/PDFs/Talks/Building%20an%20LLVM%20backend.pdf http://web.archive.org/http://llvm.org/devmtg/2014-10/Videos/Building%20an%20LLVM%20backend-720.mov http://llvm.org/devmtg/2014-10/#tutorial1 http://www.inf.ed.ac.uk/teaching/courses/ct/other/LLV...
2012 Feb 07
0
[LLVMdev] Invalid bitcode signature
On Feb 7, 2012, at 1:29 AM, Fraser Cormack wrote: > > Sorry, I was being an idiot and was trying to link the wrong file type. Sigh. > > Now I have a problem where I merge two modules each containing the same > struct, one opaque and one defined, and it's not merging the two > consistently. I have two, let's say...
2012 Mar 12
2
[LLVMdev] LLI Segfaulting
Hi Duncan, Duncan Sands wrote: > > Hi Fraser, it looks to me like you are smashing the stack. > >> define void @main() nounwind { >> allocas: >> %0 = alloca { i32, [0 x i32] }, align 8 > > ^ this allocates 4 bytes on the stack. > >> %2 = getelementptr inbounds { i32, [0 x i32] }* %0, i64 0, i32 1 > > ^ this gets a pointer to the byte
2012 Feb 07
3
[LLVMdev] Invalid bitcode signature
Sorry, I was being an idiot and was trying to link the wrong file type. Sigh. Now I have a problem where I merge two modules each containing the same struct, one opaque and one defined, and it's not merging the two consistently. I have two, let's say %"StructA" = type opaque %"StructB" = type opaque in one module, and in the other: %"StructA" = type { i8 }
2012 May 23
1
how a latent state matrix is updated using package R2WinBUGS
...ing to understand how a latent state matrix is updated by the MCMC iterations in a WinBUGS model, using the package R2WinBUGS and an example from Kery and Schaub's (2012) book, "Bayesian Population Analysis Using WinBUGS". The example I'm using is 7.3.1. from a chapter on the Cormack-Jolly-Seber model. Some excerpted code is included at the end of this message; the full code is available at http://www.vogelwarte.ch/downloads/files/publications/BPA/bpa-code.txt The latent state of individual i on occasion t is stored in the z matrix where rows index individuals (ow...
2012 Feb 03
2
[LLVMdev] Invalid bitcode signature
I'm trying to link two modules together using the C++ API, one that's a sort of library module and one that's being generated from the source language. If I have something like this: OwningPtr<MemoryBuffer> owning_ptr; if (MemoryBuffer::getFile(StringRef("../hello.bc"), owning_ptr)) std::cout << "error opening file" << std::endl; Module* Lib
2012 Feb 04
0
[LLVMdev] Invalid bitcode signature
On Feb 3, 2012, at 1:47 PM, Fraser Cormack wrote: > > I'm trying to link two modules together using the C++ API, one that's a sort > of library module and one that's being generated from the source language. > > If I have something like this: > > OwningPtr<MemoryBuffer> owning_ptr; > if (MemoryB...
2012 Feb 04
2
[LLVMdev] Invalid bitcode signature
Bill Wendling-3 wrote: > > The error is coming from the bit-code reader. Make sure that you generated > the file with '-emit-llvm' (i.e., it's not an object file) and that it's > the binary version of the bit-code file, not the text version. > > And, llvm-gcc? really? :-) > > Is there no way that the API can generate valid bitcode? And no, not really
2012 Feb 04
0
[LLVMdev] Invalid bitcode signature
Hi Fraser, On 04/02/12 12:09, Fraser Cormack wrote: > > > Bill Wendling-3 wrote: >> >> The error is coming from the bit-code reader. Make sure that you generated >> the file with '-emit-llvm' (i.e., it's not an object file) and that it's >> the binary version of the bit-code file, not the text...
2012 Feb 22
1
[LLVMdev] Size of structs & arrays
Eli Friedman-2 wrote: > > > Try llvm::Constant::getNullValue(). > > I'm trying this: llvm::Constant* one = llvm::Constant::getNullValue(llvm::IntegerType::get(mod->getContext(), 64)); llvm::ConstantInt* two = llvm::ConstantInt::get(mod->getContext(), llvm::APInt(32, llvm::StringRef("1"), 10)); std::vector<llvm::Value*> indices;
2012 Oct 04
1
[LLVMdev] RegisterClass constraints in TableGen
Hi, I've come across a problem while working on an LLVM backend for a new target architecture. This architecture has two single-ported register files. Each instruction can only read one operand from each register file, but can write to either. I tried implementing it naïvely in TableGen with two definitions per instruction, so I had: def AllRegs : RegisterClass< ... (add interleave
2012 Oct 11
0
[LLVMdev] RegisterClass constraints in TableGen
...emented my own PBQP register allocator and solved the issue very painlessly. Now onto those more interesting problems! Thanks for your suggestion, Fraser On Fri, Oct 5, 2012 at 9:26 AM, Gergö Barany <gergo at complang.tuwien.ac.at>wrote: > On Thu, Oct 04, 2012 at 16:20:53 +0100, Fraser Cormack wrote: > > This architecture has two single-ported register files. Each instruction > > can only read one operand from each register file, but can write to > either. > > Even if you can't express this in TableGen, you should be able to use the > PBQP register allocator w...
2013 Sep 14
1
LuaJIT on Xen
...aJIT and example bytecode-compiled Lua scripts. The current example compiles the ljsyscall test suite, just to show how the build works. Some things are not yet supported, like fork, exec, dynamic libraries, mmap other than a small stub. All code is MIT or BSD licensed. https://github.com/justincormack/rumpuser-xen Compiling other languages should be relatively possible too in principle. Currently it only works with 32 bit LuaJIT, it needs some fixes to mmap for 64 bit support. The build process is not very nice, and will be improved. You should be able to compile C libraries and add support,...