Displaying 4 results from an estimated 4 matches for "copystruct".
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2011 Feb 09
3
[LLVMdev] Lowering "memcpy" intrinsic function on ARM using LDMIA/STMIA
...ldr/str commands, and
further combines them into ldm/stm with special pass after register
allocation. But ldm/stm commands require registers to go in ascending
order, what is often not so after regalloc, therefore some str/ldr
commands. For example such code:
struct Foo {int a, b, c, d; }
void CopyStruct(struct Foo *a, struct Foo *b) { *a = *b; }
compiled to:
ldmia r1, {r2, r3, r12}
ldr r1, [r1, #12]
stmia r0, {r2, r3, r12}
str r1, [r0, #12]
bx lr
I ran different tests and always regalloc allocates at least one
register not in ascending order.
What is your ideas to overcome this...
2011 Feb 09
3
[LLVMdev] Lowering "memcpy" intrinsic function on ARM using LDMIA/STMIA
...ldm/stm with special pass after register
>> allocation. But ldm/stm commands require registers to go in ascending order,
>> what is often not so after regalloc, therefore some str/ldr commands. For
>> example such code:
>>
>> struct Foo {int a, b, c, d; }
>> void CopyStruct(struct Foo *a, struct Foo *b) { *a = *b; }
>>
>> compiled to:
>>
>> ldmia r1, {r2, r3, r12}
>> ldr r1, [r1, #12]
>> stmia r0, {r2, r3, r12}
>> str r1, [r0, #12]
>> bx lr
>>
>> I ran different tests and always regalloc alloca...
2011 Feb 09
0
[LLVMdev] Lowering "memcpy" intrinsic function on ARM using LDMIA/STMIA
...s after register
>>> allocation. But ldm/stm commands require registers to go in ascending order,
>>> what is often not so after regalloc, therefore some str/ldr commands. For
>>> example such code:
>>>
>>> struct Foo {int a, b, c, d; }
>>> void CopyStruct(struct Foo *a, struct Foo *b) { *a = *b; }
>>>
>>> compiled to:
>>>
>>> ldmia r1, {r2, r3, r12}
>>> ldr r1, [r1, #12]
>>> stmia r0, {r2, r3, r12}
>>> str r1, [r0, #12]
>>> bx lr
>>>
>>> I ran di...
2011 Feb 09
0
[LLVMdev] Lowering "memcpy" intrinsic function on ARM using LDMIA/STMIA
...ther combines them into ldm/stm with special pass after register
> allocation. But ldm/stm commands require registers to go in ascending order,
> what is often not so after regalloc, therefore some str/ldr commands. For
> example such code:
>
> struct Foo {int a, b, c, d; }
> void CopyStruct(struct Foo *a, struct Foo *b) { *a = *b; }
>
> compiled to:
>
> ldmia r1, {r2, r3, r12}
> ldr r1, [r1, #12]
> stmia r0, {r2, r3, r12}
> str r1, [r0, #12]
> bx lr
>
> I ran different tests and always regalloc allocates at least one register
> not in as...