search for: conv51

...uffer, i64 %tmp25 %tmp7 = shl i64 %indvar4, 1 %tmp = trunc i64 %tmp7 to i32 %tmp37 = load i8* %arrayidx, align 1, !tbaa !0 %conv = zext i8 %tmp37 to i32 %tmp43 = load i8* %arrayidx42, align 1, !tbaa !0 %conv44 = zext i8 %tmp43 to i32 %tmp50 = load i8* %arrayidx49, align 1, !tbaa !0 %conv51 = zext i8 %tmp50 to i32 %sub.i183 = add nsw i32 %conv, -128 %sub6.i184 = add nsw i32 %conv51, -128 %tmp.i185 = mul i32 %conv44, 298 %mul17.i186 = mul nsw i32 %sub6.i184, 459 %add18.i187 = add i32 %tmp.i185, -4640 %add19.i188 = add i32 %mul17.i186, %add18.i187 %shr.i189 = ashr i32 %add...

...%inputBuffer, i64 %tmp25 %tmp7 = shl i64 %indvar4, 1 %tmp = trunc i64 %tmp7 to i32 %tmp37 = load i8* %arrayidx, align 1, !tbaa !0 %conv = zext i8 %tmp37 to i32 %tmp43 = load i8* %arrayidx42, align 1, !tbaa !0 %conv44 = zext i8 %tmp43 to i32 %tmp50 = load i8* %arrayidx49, align 1, !tbaa !0 %conv51 = zext i8 %tmp50 to i32 %sub.i183 = add nsw i32 %conv, -128 %sub6.i184 = add nsw i32 %conv51, -128 %tmp.i185 = mul i32 %conv44, 298 %mul17.i186 = mul nsw i32 %sub6.i184, 459 %add18.i187 = add i32 %tmp.i185, -4640 %add19.i188 = add i32 %mul17.i186, %add18.i187 %shr.i189 = ashr i32 %add19.i188...

On Thu, Jan 26, 2012 at 3:41 PM, Hal Finkel <hfinkel at anl.gov> wrote: > On Thu, 2012-01-26 at 15:36 -0600, Sebastian Pop wrote: >> arm-none-linux-gnueabi > > Indeed, adding -ccc-host-triple arm-none-linux-gnueabi I also get Minor remark: please use -target instead of -ccc-host-triple that is now deprecated. Thanks for looking at this testcase. Sebastian -- Qualcomm

On Thu, 2012-01-26 at 15:36 -0600, Sebastian Pop wrote: > arm-none-linux-gnueabi Indeed, adding -ccc-host-triple arm-none-linux-gnueabi I also get vectorization (even though I don't get vectorization when targeting x86_64). I'll let you know what I find. -Hal -- Hal Finkel Postdoctoral Appointee Leadership Computing Facility Argonne National Laboratory