Displaying 15 results from an estimated 15 matches for "controlflow".
2013 Jan 22
0
[LLVMdev] local test-suite failures on linux
On Sun, Jan 20, 2013 at 1:26 PM, Redmond, Paul <paul.redmond at intel.com> wrote:
> There is almost certainly a bug in lnt or the makefiles.
>
> I changed the body of Burg main to the following:
>
> + printf("Hello World\n");
> + return 0;
>
>
> I re-ran the test-suite again and got the following errors:
>
> --- Tested: 986 tests --
> FAIL:
2013 Jan 20
2
[LLVMdev] local test-suite failures on linux
There is almost certainly a bug in lnt or the makefiles.
I changed the body of Burg main to the following:
+ printf("Hello World\n");
+ return 0;
I re-ran the test-suite again and got the following errors:
--- Tested: 986 tests --
FAIL: MultiSource/Applications/Burg/burg.execution_time (494 of 986)
FAIL: MultiSource/Applications/ClamAV/clamscan.execution_time (495 of 986)
FAIL:
2013 Jul 28
2
[LLVMdev] Enabling the SLP-vectorizer by default for -O3
...003
MultiSource/Benchmarks/FreeBench/pifft/pifft 5.66% 0.5003 0.5286 0.0015
MultiSource/Benchmarks/TSVC/LinearDependence-flt/LinearDependence-flt 4.85% 0.4084 0.4282 0.0014
MultiSource/Benchmarks/TSVC/LoopRestructuring-flt/LoopRestructuring-flt 4.36% 0.3856 0.4024 0.0018
MultiSource/Benchmarks/TSVC/ControlFlow-flt/ControlFlow-flt 2.62% 0.4424 0.4540 0.0019
External/SPEC/CINT2006/401_bzip2/401_bzip2 1.50% 1.0613 1.0772 0.0010
MultiSource/Benchmarks/tramp3d-v4/tramp3d-v4 1.23% 12.1337 12.2831 0.0296
MultiSource/Applications/kimwitu++/kc 1.15% 9.3690 9.4769 0.0186
SingleSource/Benchmarks/Misc-C++-EH/spirit...
2013 Sep 25
0
[LLVMdev] [Polly] Performance comparison between Cloog and ISL code generation
...nce comparison between Polly's Cloog and ISL code generator is posted on http://188.40.87.11:8000/db_default/v4/nts/59?compare_to=58&baseline=58
It seems their execution-time performance are comparable:
Performance Regressions - Execution Time (ISL over Cloog)
MultiSource/Benchmarks/TSVC/ControlFlow-flt/ControlFlow-flt 8.49%
MultiSource/Benchmarks/TSVC/StatementReordering-flt/StatementReordering-flt 6.77%
MultiSource/Benchmarks/TSVC/CrossingThresholds-flt/CrossingThresholds-flt 2.65%
SingleSource/UnitTests/Vectorizer/gcc-loops 2.63%
Performance Improvements - Execution Time (ISL over Cloog)...
2017 Jul 22
4
[RFC] Add IR level interprocedural outliner for code size.
...t; -
>
> Symbolics-dbl: 51.42%
> -
>
> Recurrences-dbl: 51.38%
> -
>
> Packing-dbl: 51.33%
>
> LO:
>
> -
>
> enc-3des: 50.7%
> -
>
> ecbdes: 46.27%
> -
>
> security-rjindael:45.13%
> -
>
> ControlFlow-flt: 25.79%
> -
>
> ControlFlow-dbl: 25.74%
>
> MO:
>
> -
>
> ecbdes: 28.22%
> -
>
> Expansion-flt: 22.56%
> -
>
> Recurrences-flt: 22.19%
> -
>
> StatementReordering-flt: 22.15%
> -
>
> Searching-flt...
2013 Jul 28
0
[LLVMdev] Enabling the SLP-vectorizer by default for -O3
.../Benchmarks/FreeBench/pifft/pifft5.66%0.50030.52860.0015
> MultiSource/Benchmarks/TSVC/LinearDependence-flt/LinearDependence-flt4.85%
> 0.40840.42820.0014
> MultiSource/Benchmarks/TSVC/LoopRestructuring-flt/LoopRestructuring-flt
> 4.36%0.38560.40240.0018
> MultiSource/Benchmarks/TSVC/ControlFlow-flt/ControlFlow-flt2.62%0.4424
> 0.45400.0019External/SPEC/CINT2006/401_bzip2/401_bzip21.50%1.06131.0772
> 0.0010MultiSource/Benchmarks/tramp3d-v4/tramp3d-v41.23%12.133712.2831
> 0.0296MultiSource/Applications/kimwitu++/kc1.15%9.36909.47690.0186
> SingleSource/Benchmarks/Misc-C++-EH/spi...
2015 Feb 26
5
[LLVMdev] [RFC] AArch64: Should we disable GlobalMerge?
Hi all,
I've started looking at the GlobalMerge pass, enabled by default on
ARM and AArch64. I think we should reconsider that, at least for
AArch64.
As is, the pass just merges all globals together, in groups of 4KB
(AArch64, 128B on ARM).
At the time it was enabled, the general thinking was "it's almost
free, it doesn't affect performance much, we might as well use it".
2015 May 15
6
[LLVMdev] Proposal: change LNT’s regression detection algorithm and how it is used to reduce false positives
tl;dr in low data situations we don’t look at past information, and that increases the false positive regression rate. We should look at the possibly incorrect recent past runs to fix that.
Motivation: LNT’s current regression detection system has false positive rate that is too high to make it useful. With test suites as large as the llvm “test-suite” a single report will show hundreds of
2015 May 18
2
[LLVMdev] Proposal: change LNT’s regression detection algorithm and how it is used to reduce false positives
...c
> 13. 37.22% cumulative (1.08% - 62.35s this program) nts.SingleSource/Benchmarks/SmallPT/smallpt.exec
> 14. 38.30% cumulative (1.08% - 62.30s this program) nts.MultiSource/Benchmarks/nbench/nbench.exec
> 15. 39.37% cumulative (1.07% - 61.98s this program) nts.MultiSource/Benchmarks/TSVC/ControlFlow-dbl/ControlFlow-dbl.exec
> 16. 40.40% cumulative (1.03% - 59.50s this program) nts.MultiSource/Applications/SPASS/SPASS.exec
> 17. 41.37% cumulative (0.97% - 55.74s this program) nts.MultiSource/Benchmarks/TSVC/Expansion-dbl/Expansion-dbl.exec
> 18. 42.33% cumulative (0.96% - 55.40s this p...
2020 Jul 02
2
RFC: Introducing CfgTraits and type-erased CfgInterface / CfgBlockRef / CfgValueRef
...new divergence/uniformity analysis that can be used on both LLVM IR and
MachineIR. This analysis has to be able to operate generically on both
basic blocks and values.
If you're interested in this larger context, feel free to take a look
here: https://github.com/nhaehnle/llvm-project/tree/controlflow-wip-v4.
There are still some missing bits and pieces and more cleanup to be done
for the parts which are not yet on Phabricator. I am going to tackle
those over the next weeks.
Templates vs. interfaces
========================
At a high level, there are two parts to the proposed framework:
-...
2013 Jul 28
0
[LLVMdev] IR Passes and TargetTransformInfo: Straw Man
...035 -2.7777777777777
Benchmarks/TSVC/Reductions-flt/Reductions-f 4.4121 4.2942 -2.6721969130346
Benchmarks/Olden/tsp/tsp 0.5126 0.5011 -2.2434646898166
Benchmarks/Trimaran/enc-pc1/enc-pc1 0.1574 0.154 -2.1601016518424
Benchmarks/TSVC/ControlFlow-flt/ControlFlow 2.351 2.3012 -2.1182475542322
Benchmarks/MiBench/network-dijkstra/network 0.0296 0.029 -2.0270270270270
Benchmarks/Ptrdist/bc/bc 0.4764 0.4674 -1.8891687657430
Benchmarks/Prolangs-C/gnugo/gnugo 0.028 0.0275...
2013 Jul 18
3
[LLVMdev] IR Passes and TargetTransformInfo: Straw Man
Andy and I briefly discussed this the other day, we have not yet got
chance to list a detailed pass order
for the pre- and post- IPO scalar optimizations.
This is wish-list in our mind:
pre-IPO: based on the ordering he propose, get rid of the inlining (or
just inline tiny func), get rid of
all loop xforms...
post-IPO: get rid of inlining, or maybe we still need it, only
2018 Apr 26
0
Compare test-suite benchmarks performance complied without TBAA, with default TBAA and with new TBAA struct path
...84141|0.647269346| -0.04| 4430743057| 0.01|0.647045686| 0| 4430743057| 0.01|
|MultiSource/Benchmarks/Ptrdist/yacr2/yacr2.test | 81| 0.41891967| 4341406074|0.415939335| 0.72| 4336616952| 0.11|0.415140426| 0.91| 4336616952| 0.11|
|MultiSource/Benchmarks/TSVC/ControlFlow-dbl/ControlFlow-dbl.test | 40|2.252897075|21925124584|2.241870402| 0.49|21925124591| 0|2.245260632| 0.34|21925124594| 0|
|MultiSource/Benchmarks/TSVC/ControlFlow-flt/ControlFlow-flt.test | 40|1.831478707|21917035866|1.839019529| -0.41|21917035878| 0|1.8...
2020 Jul 07
2
RFC: Introducing CfgTraits and type-erased CfgInterface / CfgBlockRef / CfgValueRef
...can be used on both LLVM IR and
>> MachineIR. This analysis has to be able to operate generically on both
>> basic blocks and values.
>>
>> If you're interested in this larger context, feel free to take a look
>> here: https://github.com/nhaehnle/llvm-project/tree/controlflow-wip-v4.
>> There are still some missing bits and pieces and more cleanup to be done
>> for the parts which are not yet on Phabricator. I am going to tackle
>> those over the next weeks.
>>
>>
>> Templates vs. interfaces
>> ========================
>>...
2017 Jul 20
8
[RFC] Add IR level interprocedural outliner for code size.
I’m River and I’m a compiler engineer at PlayStation. Recently, I’ve been
working on an interprocedural outlining (code folding) pass for code size
improvement at the IR level. We hit a couple of use cases that the current
code size solutions didn’t handle well enough. Outlining is one of the
avenues that seemed potentially beneficial.
-- Algorithmic Approach --
The general implementation can be