search for: context_switch

Displaying 15 results from an estimated 15 matches for "context_switch".

2013 Jun 04
13
[PATCH] x86/vtsc: update vcpu_time after hvm_set_guest_time
...t_guest_time changes hvm_vcpu.stime_offset, which is used in the vcpu time structure to calculate the tsc_timestamp, so after updating stime_offset we need to propagate the change to vcpu_time in order for the guest to get the right time if using the PV clock. This was not done correctly, since in context_switch update_vcpu_system_time was called before vmx_do_resume, which caused the vcpu_info time structure to be updated with the wrong values. This patch fixes this by calling update_vcpu_system_time after the call to hvm_set_guest_time has happened. Signed-off-by: Roger Pau Monné <roger.pau@citrix.co...
2005 Jul 13
14
[Patch] Fix IDLE issue with sedf scheduler on IA64
Hi, Dan, This patch fixes strange behavior on IA64, that IDLE is scheduled more than Dom0 with default sEDF scheduler. The key point is reprogram_ac_timer at the end of ac_timer dispatcher, which programs local apic timer with expire of next ac_timer on x86. Higher precision lapic timer can trigger ac_timer more precisely than simply done in PIT interrupt handler. That works perfectly on x86
2010 Aug 19
1
Credit Scheduler code question
Hi, I''m a PhD student trying to add some load balancing code to the credit scheduler in order to fit some specific necessities. I''m trying to understand the credit scheduler code and I don''t quite get in which part of it a pcpu starts running a vcpu. I need to keep track of when a vpcu starts running in a cpu and when it stops. Any hint on that? I think that it would
2008 Jun 16
8
Vcpu allocation for a newly created domU
Hi all, I am having confusion regarding the way a newly created domain is allocated vcpu. Initially during dom0 creation alloc_vcpu is called to create vcpu structs for all the available cpu''s and assigned to dom0. But its not the case for domU creation. 1. So how will dom0 relinquish/share vcpu to/with a newly created domU. Does this happen as part of the shared_info page mapping??
2007 Apr 18
0
[PATCH 2/6] Paravirt CPU hypercall batching mode
...ll sit in the .parainstructions section to tell us what to patch. */ struct paravirt_patch { u8 *instr; /* original instructions */ diff -r 01f2e46c1416 kernel/sched.c --- a/kernel/sched.c Thu Dec 14 14:26:24 2006 -0800 +++ b/kernel/sched.c Thu Dec 14 14:44:56 2006 -0800 @@ -1842,6 +1842,13 @@ context_switch(struct rq *rq, struct tas struct mm_struct *mm = next->mm; struct mm_struct *oldmm = prev->active_mm; + /* + * For paravirt, this is coupled with an exit in switch_to to + * combine the page table reload and the switch backend into + * one hypercall. + */ + arch_enter_lazy_cpu_mode(...
2007 Apr 18
0
[PATCH 2/6] Paravirt CPU hypercall batching mode
...ll sit in the .parainstructions section to tell us what to patch. */ struct paravirt_patch { u8 *instr; /* original instructions */ diff -r 01f2e46c1416 kernel/sched.c --- a/kernel/sched.c Thu Dec 14 14:26:24 2006 -0800 +++ b/kernel/sched.c Thu Dec 14 14:44:56 2006 -0800 @@ -1842,6 +1842,13 @@ context_switch(struct rq *rq, struct tas struct mm_struct *mm = next->mm; struct mm_struct *oldmm = prev->active_mm; + /* + * For paravirt, this is coupled with an exit in switch_to to + * combine the page table reload and the switch backend into + * one hypercall. + */ + arch_enter_lazy_cpu_mode(...
2007 Apr 18
2
[PATCH 2/5] Paravirt cpu batching.patch
...ll sit in the .parainstructions section to tell us what to patch. */ struct paravirt_patch { u8 *instr; /* original instructions */ diff -r 320f0d4d2280 kernel/sched.c --- a/kernel/sched.c Tue Dec 12 13:50:50 2006 -0800 +++ b/kernel/sched.c Tue Dec 12 13:50:53 2006 -0800 @@ -1833,6 +1833,13 @@ context_switch(struct rq *rq, struct tas struct mm_struct *mm = next->mm; struct mm_struct *oldmm = prev->active_mm; + /* + * For paravirt, this is coupled with an exit in switch_to to + * combine the page table reload and the switch backend into + * one hypercall. + */ + arch_enter_lazy_cpu_mode(...
2007 Apr 18
2
[PATCH 2/5] Paravirt cpu batching.patch
...ll sit in the .parainstructions section to tell us what to patch. */ struct paravirt_patch { u8 *instr; /* original instructions */ diff -r 320f0d4d2280 kernel/sched.c --- a/kernel/sched.c Tue Dec 12 13:50:50 2006 -0800 +++ b/kernel/sched.c Tue Dec 12 13:50:53 2006 -0800 @@ -1833,6 +1833,13 @@ context_switch(struct rq *rq, struct tas struct mm_struct *mm = next->mm; struct mm_struct *oldmm = prev->active_mm; + /* + * For paravirt, this is coupled with an exit in switch_to to + * combine the page table reload and the switch backend into + * one hypercall. + */ + arch_enter_lazy_cpu_mode(...
2013 May 01
8
[PATCH 0/2] runstate_memory_area on ARM
Hi all, this patch series introduces support for runstate_memory_area on ARM. The first patch moves VCPUOP_register_runstate_memory_area to common code, while the second one add VCPUOP_register_runstate_memory_area to the whilelist of vcpu_op hypercalls supported on ARM and properly updates the runstate_memory_area during vcpu context switch. Stefano Stabellini (2): xen: move
2007 Aug 08
2
[PATCH] x86-64: syscall/sysenter support for 32-bit apps
...* due to use of syscall from compatibility mode when the kernel + * didn''t set the compatibility mode callback. + */ + v->arch.syscall32_callback_eip = c.nat->syscall_callback_eip; +#endif + } #ifdef CONFIG_COMPAT else { @@ -1292,7 +1309,9 @@ void context_switch(struct vcpu *prev, s local_flush_tlb_one(GDT_VIRT_START(next) + FIRST_RESERVED_GDT_BYTE); - if ( !is_pv_32on64_vcpu(next) == !(efer & EFER_SCE) ) + if ( (!is_pv_32on64_vcpu(next) + || (next->arch.syscall32...
2010 Mar 01
0
[PATCH 2/2 V2] drm/nv50: Improve PGRAPH interrupt handling.
...IFY. */ + if (status & 0x00000040) { + nouveau_graph_trap_info(dev, &trap); + if (nouveau_ratelimit()) + nouveau_graph_dump_trap_info(dev, + "PGRAPH_DOUBLE_NOTIFY", &trap); + status &= ~0x00000040; + nv_wr32(dev, NV03_PGRAPH_INTR, 0x00000040); + } + + /* CONTEXT_SWITCH: PGRAPH needs us to load a new context */ if (status & 0x00001000) { nv_wr32(dev, 0x400500, 0x00000000); nv_wr32(dev, NV03_PGRAPH_INTR, @@ -613,49 +1115,59 @@ nv50_pgraph_irq_handler(struct drm_device *dev) status &= ~NV_PGRAPH_INTR_CONTEXT_SWITCH; } - if (status &...
2010 Feb 28
1
[PATCH 1/2] drm/nv50: Make ctxprog wait until interrupt handler is done.
This will fix races between generated ctxprogs and interrupt handler. Signed-off-by: Marcin Ko?cielnicki <koriakin at 0x04.net> --- drivers/gpu/drm/nouveau/nv50_grctx.c | 5 +++++ 1 files changed, 5 insertions(+), 0 deletions(-) diff --git a/drivers/gpu/drm/nouveau/nv50_grctx.c b/drivers/gpu/drm/nouveau/nv50_grctx.c index d105fcd..9f909ab 100644 ---
2013 Sep 23
57
[PATCH RFC v13 00/20] Introduce PVH domU support
This patch series is a reworking of a series developed by Mukesh Rathor at Oracle. The entirety of the design and development was done by him; I have only reworked, reorganized, and simplified things in a way that I think makes more sense. The vast majority of the credit for this effort therefore goes to him. This version is labelled v13 because it is based on his most recent series, v11.
2012 Jan 09
39
[PATCH v4 00/25] xen: ARMv7 with virtualization extensions
Hello everyone, this is the fourth version of the patch series that introduces ARMv7 with virtualization extensions support in Xen. The series allows Xen and Dom0 to boot on a Cortex-A15 based Versatile Express simulator. See the following announce email for more informations about what we are trying to achieve, as well as the original git history: See
2011 Dec 06
57
[PATCH RFC 00/25] xen: ARMv7 with virtualization extensions
Hello everyone, this is the very first version of the patch series that introduces ARMv7 with virtualization extensions support in Xen. The series allows Xen and Dom0 to boot on a Cortex-A15 based Versatile Express simulator. See the following announce email for more informations about what we are trying to achieve, as well as the original git history: See