search for: constantpool

Displaying 20 results from an estimated 92 matches for "constantpool".

2016 Aug 02
2
Instruction selection problems due to SelectionDAGBuilder
...6, <8 x i64> undef, <8 x i32> zeroinitializer %induction58 = add <8 x i64> %.splat57, <i64 0, i64 -1, i64 -2, i64 -3, i64 -4, i64 -5, i64 -6, i64 -7> br label %vector.body25 The exact problem reported is: Selecting: t51: v8i64,ch = load<LD64[ConstantPool]> t0, ConstantPool:i64<<8 x i64> <i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7>> 0, undef:i64 ISEL: Starting pattern match on root node: t51: v8i64,ch = load<LD64[ConstantPool]> t0, ConstantPool:i64<<8 x i64> <i64 0, i64 1, i64 2, i64 3, i...
2013 Dec 17
0
[LLVMdev] Implementing the ldr pseudo instruction in ARM integrated assembler
Hi David, Maybe I’m just blind, but where’s the code to handle the .ltorg directive? Is that a separate patch, maybe? Without that, this is not going to be usable in any circumstance using subsections-via-symbols. +typedef std::map<const MCSection *, ConstantPool> ConstantPoolMapTy; This feels odd to me. Can you elaborate a bit more on the data structure choices?? I would have expected constants to be grouped together explicitly by section and then a nested loop over those sections instead. As-is, won’t this potentially cause lots of switching back and...
2013 Nov 16
2
[LLVMdev] Implementing the ldr pseudo instruction in ARM integrated assembler
...RE: [LLVMdev] Implementing the ldr pseudo instruction in ARM > > integrated assembler > > > > Hi David, > > > > Thanks for your efforts here. I have a few comments on your patch, > > although I realise it's still a work in progress. > > > > +class ConstantPool { > > + MCSymbol *Label; > > + typedef std::vector<const MCExpr*> EntryVecTy; > > > > Use a SmallVector here? > > > > + MCSymbol *getLabel() {return Label;} size_t getNumEntries() > > + {return Entries.size();} const MCExpr *getEntry(size_t Num)...
2013 Dec 17
2
[LLVMdev] Implementing the ldr pseudo instruction in ARM integrated assembler
...n of all three for easy reading). I believe many of your concerns were addressed. See below for a detailed response. > Maybe I'm just blind, but where's the code to handle the .ltorg directive? It is implemented in patch 0003 in this email. > +typedef std::map<const MCSection *, ConstantPool> ConstantPoolMapTy; > > This feels odd to me. Can you elaborate a bit more on the data structure > choices?? I would have expected constants to be grouped together > explicitly by section and then a nested loop over those sections instead. > As-is, won't this potentially caus...
2013 Dec 17
0
[LLVMdev] Implementing the ldr pseudo instruction in ARM integrated assembler
...a few specific questions below, and I’ll follow up on the new patch separately. >> Maybe I'm just blind, but where's the code to handle the .ltorg directive? > > It is implemented in patch 0003 in this email. Excellent. > >> +typedef std::map<const MCSection *, ConstantPool> ConstantPoolMapTy; >> >> This feels odd to me. Can you elaborate a bit more on the data structure >> choices?? I would have expected constants to be grouped together >> explicitly by section and then a nested loop over those sections instead. >> As-is, won't t...
2007 Jan 05
0
[LLVMdev] constant pool in large functions
...ve. Basically you need a pass just before code emission to find the proper locations for each constant pool. That means you need: 1. Exact size of each instruction. This can be added with a custom instrinfo that specify instruction length for each target instruction. 2. Probably some kind of constantpool pseudo instruction. The pass can then insert new constantpool instructions at the right locations to solve this problem. Evan On Jan 5, 2007, at 9:15 AM, Lauro Ramos Venancio wrote: > I'm facing a problem with constant pool in large functions. > > The LLVM prints constant pool at...
2012 Feb 17
0
[LLVMdev] ARM/Thumb2/ISEL Need help tracing down a failing match: (HOW?)
...ARMGenDAGIsel.inc in the debugger, I would greatly like some help in tracking down a failing match to a pattern I specified: First, here is a snippet of a successful match (done in ARM mode) ISEL: Starting pattern match on root node: 0x1e7adf0: i32,ch = load 0x1e4c030, 0x1e78210, 0x1e78310<LD4[ConstantPool]> [ID=10] Initial Opcode index to 24435 ...... Morphed node: 0x1e7adf0: i32,ch = LDRi12 0x1e78210, 0x1e78010, 0x1e7aef0, 0x1e7b0f0, 0x1e4c030<Mem:LD4[ConstantPool]> ISEL: Match complete! ISEL: Starting pattern match on root node: 0x1e78210: i32 = ARMISD::Wrapper 0x1e77f10 [ID=9] I...
2013 Nov 11
0
[LLVMdev] Implementing the ldr pseudo instruction in ARM integrated assembler
...o implementing it this way. Here is my approach: Add a finishParse() callback to the target asm parser This callback is invoked when the parse has finished successfully. It will be used to write out constant pools for the ldr pseudo. LDR pseudo implementation Keep a map from Section => ConstantPool When parsing ldr r0, =val parse val as an MCExpr get ConstantPool for current Section remember val in ConstantPool (at next available Offset) add operand to ldr that is MCExpr of (ConstantPool.Label + Offset) On finishParse() callback Write out all non-empty constant pool v...
2007 Jan 05
2
[LLVMdev] constant pool in large functions
I'm facing a problem with constant pool in large functions. The LLVM prints constant pool at the beginning of functions. In large functions loads can be far from constant pool. GCC resolves this situations by spreading constants throughtout functions. A C test and the code generated by LLVM and GCC are attached. As you can see in the following error the ldr is too far from constant: $
2008 Mar 30
3
[LLVMdev] Being able to know the jitted code-size before emitting
Hi everyone, vmkit requires to know the size of a jitted method before emitting the method. This allows to allocate the correct size for the method. The attached patch creates this functionality when the flag SizedMemoryCode is on. In order to implement this functionality, i had to virtualize some MachineCodeEmitter functions. Is it OK to commit the patch? Thanks, Nicolas --------------
2008 Oct 07
2
[LLVMdev] Spilling constants to memory
Is there any way to get llvm to not spill floating point constants to memory but to keep them in registers, i.e. get rid of the constantPool and just generate ConstantFP instructions? Micah Villmow Systems Engineer Advanced Technology & Performance Advanced Micro Devices Inc. 4555 Great America Pkwy, Santa Clara, CA. 95054 P: 408-572-6219 F: 408-572-6596 -------------- next part -------------- An HTML attachment was s...
2007 Jan 18
0
Branch 'interpreter' - 4 commits - libswfdec/js libswfdec/swfdec_bits.c libswfdec/swfdec_bits.h libswfdec/swfdec_codec_screen.c libswfdec/swfdec_image.c libswfdec/swfdec_script.c libswfdec/swfdec_swf_decoder.c libswfdec/swfdec_tag.c
...turn JS_TRUE; +} + /*** PRINT FUNCTIONS ***/ static char * @@ -352,6 +365,7 @@ swfdec_action_print_push (guint action, break; case 7: /* 32bit int */ g_string_append_printf (string, "%u", swfdec_bits_get_u32 (&bits)); + break; case 8: /* 8bit ConstantPool address */ g_string_append_printf (string, "Pool %u", swfdec_bits_get_u8 (&bits)); break; @@ -450,7 +464,7 @@ static const SwfdecActionSpec actions[25 [0x15] = { "StringExtract", NULL }, [0x17] = { "Pop", NULL }, [0x18] = { "ToInteger", N...
2008 Apr 01
2
[LLVMdev] Being able to know the jitted code-size before emitting
...>> + /// SizeEmitter - The JIT implementation of the >> MachineCodeEmitter, which is >> + /// used to output functions to memory for execution. >> +class SizeEmitter : public MachineCodeEmitter { >> + MachineFunction * Fn; >> + void* ConstantPoolBase; >> + void* JumpTableBase; >> + MachineConstantPool *ConstantPool; >> + MachineJumpTableInfo *JumpTable; >> + std::vector<intptr_t> LabelLocations; >> + MachineCodeEmitter* MCE; >> + >> +public: >> + SizeEmitter(MachineCodeEmitter* mce...
2008 Mar 31
0
[LLVMdev] Being able to know the jitted code-size before emitting
...> +namespace llvm { > + /// SizeEmitter - The JIT implementation of the > MachineCodeEmitter, which is > + /// used to output functions to memory for execution. > +class SizeEmitter : public MachineCodeEmitter { > + MachineFunction * Fn; > + void* ConstantPoolBase; > + void* JumpTableBase; > + MachineConstantPool *ConstantPool; > + MachineJumpTableInfo *JumpTable; > + std::vector<intptr_t> LabelLocations; > + MachineCodeEmitter* MCE; > + > +public: > + SizeEmitter(MachineCodeEmitter* mce) { > + CurBufferPtr = 0;...
2008 Apr 01
0
[LLVMdev] Being able to know the jitted code-size before emitting
...#47;/ SizeEmitter - The JIT implementation of the >>> MachineCodeEmitter, which is >>> + /// used to output functions to memory for execution. >>> +class SizeEmitter : public MachineCodeEmitter { >>> + MachineFunction * Fn; >>> + void* ConstantPoolBase; >>> + void* JumpTableBase; >>> + MachineConstantPool *ConstantPool; >>> + MachineJumpTableInfo *JumpTable; >>> + std::vector<intptr_t> LabelLocations; >>> + MachineCodeEmitter* MCE; >>> + >>> +public: >>> + Siz...
2008 Apr 04
3
[LLVMdev] Being able to know the jitted code-size before emitting
...r - The JIT implementation of the >>>> MachineCodeEmitter, which is >>>> + /// used to output functions to memory for execution. >>>> +class SizeEmitter : public MachineCodeEmitter { >>>> + MachineFunction * Fn; >>>> + void* ConstantPoolBase; >>>> + void* JumpTableBase; >>>> + MachineConstantPool *ConstantPool; >>>> + MachineJumpTableInfo *JumpTable; >>>> + std::vector<intptr_t> LabelLocations; >>>> + MachineCodeEmitter* MCE; >>>> + >>>>...
2008 Apr 05
2
[LLVMdev] Being able to know the jitted code-size before emitting
...t;>>>> MachineCodeEmitter, which is >>>>>> + /// used to output functions to memory for execution. >>>>>> +class SizeEmitter : public MachineCodeEmitter { >>>>>> + MachineFunction * Fn; >>>>>> + void* ConstantPoolBase; >>>>>> + void* JumpTableBase; >>>>>> + MachineConstantPool *ConstantPool; >>>>>> + MachineJumpTableInfo *JumpTable; >>>>>> + std::vector<intptr_t> LabelLocations; >>>>>> + MachineCodeEmitter* M...
2017 Aug 06
2
VBROADCAST Implementation Issues
...>>>>>> now getting this error: >>>>>>>>>>>>> >>>>>>>>>>>>> LLVM ERROR: Cannot select: t63: v64f32 = X86ISD::VBROADCAST t62 >>>>>>>>>>>>> t62: f32,ch = load<LD4[ConstantPool]> t0, t65, undef:i64 >>>>>>>>>>>>> t65: i64 = X86ISD::Wrapper TargetConstantPool:i64<float >>>>>>>>>>>>> 0x3FC99999A0000000> 0 >>>>>>>>>>>>> t64: i64 = TargetConst...
2008 Apr 05
0
[LLVMdev] Being able to know the jitted code-size before emitting
...t; MachineCodeEmitter, which is >>>>>>> + /// used to output functions to memory for execution. >>>>>>> +class SizeEmitter : public MachineCodeEmitter { >>>>>>> + MachineFunction * Fn; >>>>>>> + void* ConstantPoolBase; >>>>>>> + void* JumpTableBase; >>>>>>> + MachineConstantPool *ConstantPool; >>>>>>> + MachineJumpTableInfo *JumpTable; >>>>>>> + std::vector<intptr_t> LabelLocations; >>>>>>> + M...
2008 Apr 04
0
[LLVMdev] Being able to know the jitted code-size before emitting
...tation of the >>>>> MachineCodeEmitter, which is >>>>> + /// used to output functions to memory for execution. >>>>> +class SizeEmitter : public MachineCodeEmitter { >>>>> + MachineFunction * Fn; >>>>> + void* ConstantPoolBase; >>>>> + void* JumpTableBase; >>>>> + MachineConstantPool *ConstantPool; >>>>> + MachineJumpTableInfo *JumpTable; >>>>> + std::vector<intptr_t> LabelLocations; >>>>> + MachineCodeEmitter* MCE; >>>>...