Displaying 2 results from an estimated 2 matches for "connexregisterinfo".
2016 Jan 07
3
BPF backend with vector operations - some strange error
Hello.
I've tried to add some simple arithmetic vector operations to the BPF backend
available in the LLVM repo. Because I added in BPFRegisterInfo.td another RegisterClass
(taken from the Mips backend):
def MSA128W: RegisterClass<"BPF", [v2i64, v2f64], 128,
(sequence "W%u", 0, 31)>;
in order to support vector for example, ADD
2016 Jun 02
2
BPF backend with vector operations - error "Could not infer all types in, pattern!"
...What I did was to edit ConnexInstrInfo.td and replaced all occurrences:
> PatLeaf<(imm)
> %(which were ambiguous since the variable name ("in dag operator") does not have a
> type and this poses issues to the Type inference algorithm, since I added in
> ConnexRegisterInfo.td a second RegisterClass with type v2i64)
> with
> PatLeaf<(i64 imm)
> namely:
> - def i64immSExt32 : PatLeaf<(i64 imm),
> [{return isInt<32>(N->getSExtValue()); }]>;
>
> Best regards,
> Alex
>
> On...