search for: condbranch

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2016 Mar 09
2
[CodeGen] PeepholeOptimizer: optimizing condition dependent instrunctions
...I, &MBB)) || 01580 (MI->isSelect() && optimizeSelect(MI, LocalMIs))) { 01581 // MI is deleted. 01582 LocalMIs.erase(MI); 01583 Changed = true; 01584 continue; 01585 } 01586 01587 if (MI->isConditionalBranch() && optimizeCondBranch(MI)) { 01588 Changed = true; 01589 continue; 01590 } CmpInstr, SelectInstr and CondBranch are processed separately. It's assumed that CmpInstr and SelectInstr are deleted but CondBranch is not. In fact CmpInstr is always connected to SelectInstr or CondBranch or both of t...
2016 Mar 10
2
[CodeGen] PeepholeOptimizer: optimizing condition dependent instrunctions
...instructions which use AArch64::NZCV whether they can be substituted with the simpler version. After all I delete CmpInstr. This approach contradicts with PeepholeOptimizer design because BRC and SEL must be processed in corresponding functions. Yes, 'analyzeCompare' is cheap but in optimizeCondBranch and in optimizeSelect we need to go up to find the instruction defining condition flags. In case of BRC CMP should not be far from it but I am not sure about SEL. Also when BRC is replaced with BR CMP can be removed (BTW processing of instructions below BRC can be stopped). I don't know if ther...
2010 Nov 24
1
[LLVMdev] Selecting BRCOND instead of BRCC
...0x16d5748: ch = EntryToken [ORD=1] [ID=0] 0x170db60: i16 = Register %reg16387 [ORD=1] [ID=1] 0x170ec00: i16 = Constant<0> [ORD=1] [ID=8] 0x170ef00: ch = BasicBlock<bb1 0x170a5d8> [ID=10] In my InstrInfo.td file I'm trying to match BRCOND as follows: let isBranch = 1 in def CondBranch : F3_1<2, 0b000101, (outs), (ins IntRegs:$L, i16imm:$R, brtarget:$dst), "; TODO: do conditional branching.", [(brcond (seteq IntRegs:$L, simm8:$R), bb:$dst)]>; I know CondBranch only handles SETEQ, but it should still match the code above...
2010 Dec 15
0
[LLVMdev] Optimization passes break machine instructions on new backend
...oved down to after the PHI node. My guess is that > the 'dead' in CFR<imp-def,dead> is to blame, but I can't see what I'm doing > differently from MSP430/sparc that makes this not work. Any help GREATLY > appreciated! It seems like no use of CFR after CMP, indeed. How condbranches on your platform look like (patterns, etc.) ? -- With best regards, Anton Korobeynikov Faculty of Mathematics and Mechanics, Saint Petersburg State University
2010 Dec 15
2
[LLVMdev] Optimization passes break machine instructions on new backend
Hello! I'm working on a new back-end and have hit a bit of a snag. I'm working on getting selectcc working and have followed the MSP430 model of emitting a custom CMP and SELECT_CC node and matching that with a pseudo-instruction that has useCustomEmitter=1. However, my output ends up very wrong, despite the Machine code being initially correct: # Machine code for function func: Function
2010 Dec 15
2
[LLVMdev] Optimization passes break machine instructions on new backend
...e. My guess is > that > > the 'dead' in CFR<imp-def,dead> is to blame, but I can't see what I'm > doing > > differently from MSP430/sparc that makes this not work. Any help GREATLY > > appreciated! > It seems like no use of CFR after CMP, indeed. How condbranches on > your platform look like (patterns, etc.) ? > > -- > With best regards, Anton Korobeynikov > Faculty of Mathematics and Mechanics, Saint Petersburg State University > -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pi...