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...<stoklund at 2pi.dk> wrote: > > On Jan 3, 2014, at 1:52 PM, Andrew Trick <atrick at apple.com> wrote: > >> He really just wants to rerun LiveIntervals analysis, but LiveVariables is no longer available. Would it work just to clear all the intervals rerun LiveIntervals::computeVirtRegs after all the CFG transforms are complete? > > Yes, I should think so. > > /jakob > > > Thank you very much for your talk. > I think I could append more information about updating LiveIntervals. > 1. It works well if I just use from step1 to step3, without step4. >...

On Jan 3, 2014, at 1:52 PM, Andrew Trick <atrick at apple.com> wrote: > He really just wants to rerun LiveIntervals analysis, but LiveVariables is no longer available. Would it work just to clear all the intervals rerun LiveIntervals::computeVirtRegs after all the CFG transforms are complete? Yes, I should think so. /jakob -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20140103/fb415a03/attachment.html>

Hi, I insert a new machine basic block(MBB) before Greedy Register Allocation, after Simple Register Coalescing. But I encounter a fatal error "regalloc = ... not currently supported with -O0". I use command line with opt level O2, not O0. The probable reason of this error is that no LiveInterval information for newly MBB which is used by Register Allocation. And, LiveIntervals depend

On Jan 3, 2014, at 1:06 PM, Andrew Trick <atrick at apple.com> wrote: > > On Jan 3, 2014, at 12:10 PM, Jakob Stoklund Olesen <stoklund at 2pi.dk> wrote: > >> >> On Jan 3, 2014, at 11:01 AM, Andrew Trick <atrick at apple.com> wrote: >> >>> >>> On Jan 3, 2014, at 4:58 AM, Haishan <hndxvon at 163.com> wrote: >>>

...gFromStackSlot(*MBB, MI, destinationReg, FrameIndex, &CLP::FPUaOffsetClassRegClass, TRI); The code after customInserter seems valid but the compilation later hang-up in an infinite loop in procedure computeVirtRegs(); of pass LiveIntervals::runOnMachineFunction. In other targets, I've seen an example with a setIsDef(true) for such physically mapped register. Is there something missing in my code (register other setting,...) ? [http://www.spacebel.be/wp-content/uploads/2011/06/image-sign-sbp.jpg] Dom...

...ted. It is supposed to be user-friendly but should probably be changed to be more specific. If you schedule a new pass between coalescing and regalloc, it needs to preserve LiveIntervals analysis. There are utilities to recompute live intervals for individual virtual registers. See LiveIntervals::computeVirtRegs. LiveVariables is not actually needed to update live intervals. It is only added as a requirement to make sure it runs before the 2-address pass. -Andy Thank you for your reply. I do it as you tell me, and you are right. My update steps are shown following: LiveIntervals *LIS = &get...

...gFromStackSlot(*MBB, MI, destinationReg, FrameIndex, &CLP::FPUaOffsetClassRegClass, TRI); The code after customInserter seems valid but the compilation later hang-up in an infinite loop in procedure computeVirtRegs(); of pass LiveIntervals::runOnMachineFunction. In other targets, I've seen an example with a setIsDef(true) for such physically mapped register. Is there something missing in my code (register other setting,...) ? [http://www.spacebel.be/wp-content/uploads/2018/02/image-sign-sbp30y-1.jpg]...

...                       MI, destinationReg, > FrameIndex, > > > &CLP::FPUaOffsetClassRegClass, TRI); > > > The code after customInserter seems valid but the compilation later > hang-up in an infinite loop in procedure computeVirtRegs(); of pass > LiveIntervals::runOnMachineFunction. > > In other targets, I’ve seen an example with a setIsDef(true) for such > physically mapped register. Is there something missing in my code > (register other setting,…) ? > > > > > > > http://www.space...

...                       MI, destinationReg, > FrameIndex, > > > &CLP::FPUaOffsetClassRegClass, TRI); > > > The code after customInserter seems valid but the compilation later > hang-up in an infinite loop in procedure computeVirtRegs(); of pass > LiveIntervals::runOnMachineFunction. > > In other targets, I’ve seen an example with a setIsDef(true) for such > physically mapped register. Is there something missing in my code > (register other setting,…) ? > > > > > > > http://www.space...