search for: computeregarea

Displaying 4 results from an estimated 4 matches for "computeregarea".

[LLVMdev] ARM struct byval size > 64 triggers failure
2013 Jun 19
2
[LLVMdev] ARM struct byval size > 64 triggers failure
...>> ..... >> } >> Only r1, r2 used for struct byval, NumGPRs = 2, VARegSize = 8, VARegSaveSize =8, this case works, able to access arg1. >> >> Please correct me, if my above understanding is wrong about NumGPRs, VARegSaveSize calculation. >> >> Align in computeRegArea is 8 since ABI says the stack pointer needs to be 8 byte aligned at function entry point. >> But the second argument does not have to be 8 byte aligned, in fact it is 4 byte aligned for i32. >> >> Ok. >> >> r11, #76 is equivalent to sp_at_entry + 52 since r11 = spa...
[LLVMdev] ARM struct byval size > 64 triggers failure
2013 Jun 18
0
[LLVMdev] ARM struct byval size > 64 triggers failure
...> mov r11, sp > sub sp, sp, #8 > str r3, [r11, #20] > str r2, [r11, #16] > str r1, [r11, #12] > ldr r1, [r11, #76] VARegSaveSize is 16 because we store the first 16 bytes of struct byval in r0 to r3. Align in computeRegArea is 8 since ABI says the stack pointer needs to be 8 byte aligned at function entry point. But the second argument does not have to be 8 byte aligned, in fact it is 4 byte aligned for i32. r11, #76 is equivalent to sp_at_entry + 52 since r11 = spat_entry - 16 - 8, which is 4-byte aligned after stor...
[LLVMdev] ARM struct byval size > 64 triggers failure
2013 Jun 18
3
[LLVMdev] ARM struct byval size > 64 triggers failure
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[LLVMdev] ARM struct byval size > 64 triggers failure
2013 Jun 20
1
[LLVMdev] ARM struct byval size > 64 triggers failure
...>>> VARegSaveSize =8, this case works, able to access arg1. > >>> > >>> > >>> Please correct me, if my above understanding is wrong about NumGPRs, > >>> VARegSaveSize calculation. > >>> > >>> > >>> Align in computeRegArea is 8 since ABI says the stack pointer needs > >>> to be 8 byte aligned at function entry point. > >>> But the second argument does not have to be 8 byte aligned, in fact > >>> it is 4 byte aligned for i32. > >>> Ok. > >>> r11, #76 is equiv...