Displaying 9 results from an estimated 9 matches for "compute_impulse_response".
2009 Jun 14
1
Resampler saturation, blackfin performance
...BF536 400/133 Mhz
3. Profiler says:
vq_nbest 33.05%
vq_nbest_sign 11.12%
filter_mem16 4.14%
inner_prod 4.07%
iir_mem16 2.75%
qmf_synth 2.32%
lsp_to_lpc 2.32%
open_loop_nbest_pitch 1.41%
compute_impulse_response 1.37%
qmf_decomp 1.28%
lpc_to_lsp 1.26%
fir_mem16 1.16%
speex_bits_pack 1.07%
speex_bits_unpack_unsigned 0.86%
compute_rms16 0.79%
4. I'm using the echo-canceller + preprocessor,
I'd really like to improve performan...
2006 Jan 18
2
TI 6xxx platform performance
...9;m confident I can get 32 channels by
optimizing 5 or 6 functions. I expect these numbers to translate over the
DM642.
Symbol Name Count cycle.Total: Incl.
cycle.Total:Excl.
compute_weighted_codebook 200 4511420 4511420
iir_mem2 599 3338308 3338308
filter_mem2 799 2323655 2323655
compute_impulse_response 200 1800518 1800518
pitch_gain_search_3tap 199 4726604 1744952
open_loop_nbest_pitch 199 4204121 1641016
vq_nbest 800 1626252 1626252
lpc_to_lsp 50 1612650 1558133
nb_encode 50 27412845 1179551
fir_mem2 50 1097300 1097300
inner_prod 27469 1072299 1072299
split_cb_sea...
2006 Jan 18
2
Errors in speex lib with Blackfin
Hello!
I'v downloaded speex lib 1.1.11.1.
I am trying to port speex lib to Blackfin processor.
I am using VisualDSP++ 4.0.
If I am compiling source codes with using floating point everything
ok.
When I am compiling with FIXED_POINT defined everything's ok and code
works about two times faster.
But when I am defining BFIN_ASM I am getting several compiling errors
in Blackfin assembler
2005 Aug 15
2
Updated MIPs and memory requirements for TI c54x or c55 DSPs
Hi,
I can see that there has been some effort to compile the SPEEX codec to
operate on the TI c54x and c55x DSPs and I am wondering if anyone would
be able to update the mailing list with their current MIPs and Memory
resource requirements for their c54x and/or c55x compilation? The only
estimate I was able to find in the mailing list archive was 42MIPs but
I'm not sure if this is an
2005 Aug 17
2
Updated MIPs and memory requirements for TI c54x or c55DSPs
...second
thing is in the filters (*_mem2() functions). The reference
implementation assumes that writes are as fast as reads. This is often
not true on DSPs (at least on Blackfin), so it is possible to re-write
the algorithm to take that into account. There is an example (in C) for
filter_mem2() and compute_impulse_response() at the end of
filters_bfin.h.
Hope this helps.
Jean-Marc
Le mercredi 17 ao?t 2005 ? 16:41 -0400, Jim Crichton a ?crit :
> The 42 MIP number was from my post of 24 May, and it was for C55x and
> Speex 1.1.8. I tested 1.1.10 yesterday, and the number went down very
> slightly; it was...
2009 Apr 24
2
[PATCH] Blackfin: cleanup astat/cc/hardware loop asm clobbers
...quot;, "R5", "P0", "P1", "P2", "P3", "P4", "B1", "I1", "I3", "L1", "L3", "memory",
+ "ASTAT" BFIN_HWLOOP0_REGS BFIN_HWLOOP1_REGS
);
}
@@ -426,7 +430,8 @@ void compute_impulse_response(const spx_coef_t *ak, const spx_coef_t *awk1, cons
"LOOP_END samples%=;\n\t"
: "=a" (ytmp2), "=a" (y)
: "a" (awk2), "a" (ak), "d" (ord), "m" (N), "0" (ytmp2), "1" (y)
- : "A0", &q...
2008 Mar 29
0
GCC/ELF Visibility patch
..._scal1
-R exc_gain_quant_scal1_bound
-R exc_gain_quant_scal3
-R exc_gain_quant_scal3_bound
-R gain_cdbk_lbr
-R gain_cdbk_nb
-R hexc_10_32_table
-R hexc_table
-R high_lsp_cdbk
-R high_lsp_cdbk2
-R lag_window
-R lpc_window
-R shift_filt
-R vbr_hb_thresh
-R vbr_nb_thresh
-R vbr_uhb_thresh
-T bw_lpc
-T compute_impulse_response
-T compute_rms
-T compute_rms16
-T filter_mem16
T _fini
-T fir_mem16
-T forced_pitch_quant
-T forced_pitch_unquant
-T highpass
-T iir_mem16
T _init
-T inner_prod
-T interp_pitch
-T lpc_to_lsp
-T lsp_enforce_margin
-T lsp_interpolate
-T lsp_quant_high
-T lsp_quant_lbr
-T lsp_quant_nb
-T lsp_to_lpc...
2008 Mar 29
2
GCC/ELF Visibility patch (fwd)
..._scal1
-R exc_gain_quant_scal1_bound
-R exc_gain_quant_scal3
-R exc_gain_quant_scal3_bound
-R gain_cdbk_lbr
-R gain_cdbk_nb
-R hexc_10_32_table
-R hexc_table
-R high_lsp_cdbk
-R high_lsp_cdbk2
-R lag_window
-R lpc_window
-R shift_filt
-R vbr_hb_thresh
-R vbr_nb_thresh
-R vbr_uhb_thresh
-T bw_lpc
-T compute_impulse_response
-T compute_rms
-T compute_rms16
-T filter_mem16
T _fini
-T fir_mem16
-T forced_pitch_quant
-T forced_pitch_unquant
-T highpass
-T iir_mem16
T _init
-T inner_prod
-T interp_pitch
-T lpc_to_lsp
-T lsp_enforce_margin
-T lsp_interpolate
-T lsp_quant_high
-T lsp_quant_lbr
-T lsp_quant_nb
-T lsp_to_lpc...
2005 May 25
3
Speex on TI C6x, Problem with TI C5x Patch
...gt;lpcSize);
else
{
st->bw_lpc2[0]=1;
for (i=1;i<=st->lpcSize;i++)
st->bw_lpc2[i]=0;
}
for (i=0;i<st->subframeSize;i++)
real_exc[i] = exc[i];
if (st->complexity==0)
response_bound >>= 1;
compute_impulse_response(st->interp_qlpc, st->bw_lpc1, st->bw_lpc2,
syn_resp, response_bound, st->lpcSize, stack);
for (i=response_bound;i<st->subframeSize;i++)
syn_resp[i]=VERY_SMALL;
/* Reset excitation */
for (i=0;i<st->subframeSize;i++)
exc[i]=VERY_SMALL;...