Displaying 6 results from an estimated 6 matches for "compressstor".
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compressstore
2016 Sep 19
2
RFC: New intrinsics masked.expandload and masked.compressstore
...poster ( http://llvm.org/devmtg/2013-11/slides/Demikhovsky-Poster.pdf ) you'll find depicted "compress" and "expand" patterns.
The RFC proposes to support this functionality by introducing two intrinsics to LLVM IR:
llvm.masked.expandload.*
llvm.masked.compressstore.*
The syntax of these two intrinsics is similar to the syntax of llvm.masked.load.* and masked.store.*, respectively, but the semantics are different, matching the above patterns.
%res = call <16 x float> @llvm.masked.expandload.v16f32.p0f32 (float* %ptr, <16 x i1>%mask...
2016 Sep 26
2
RFC: New intrinsics masked.expandload and masked.compressstore
...on() - handle only exotic
|> target-specific cases
|>
|> Pros:
|> It will allow us to implement all X86 specific solutions.
|> The expandload and compresssrore intrinsics may be x86 specific,
|> polymorphic:
|> llvm.x86.masked.expandload()
|> llvm.x86.masked.compressstore()
|>
|> Cons:
|>
|> TTI will need to deal with Loop Info, SCEVs and other loop analysis
|> info that it does not have today. (I do not like this way)
|
|Giving TTI the loop and other analyses, in itself, does not bother me.
|getUnrollingPreferences takes a Loop*. I...
2016 Sep 25
5
RFC: New intrinsics masked.expandload and masked.compressstore
...press/expand and may be others
TTI->vectorizeMemoryInstruction() - handle only exotic target-specific cases
Pros:
It will allow us to implement all X86 specific solutions.
The expandload and compresssrore intrinsics may be x86 specific, polymorphic:
llvm.x86.masked.expandload()
llvm.x86.masked.compressstore()
Cons:
TTI will need to deal with Loop Info, SCEVs and other loop analysis info that it does not have today. (I do not like this way)
Or we'll need to introduce TLV - Target Loop Vectorizer - a new class that handles all target specific cases. This solution seems more reasonable, but too he...
2019 Aug 29
2
Complex proposal v2
...<4 x c32> %passthrough)
declare v8c32 @llvm.masked.expandload.v8c64.p0v8c64(c64* %ptr,
<8 x i1> %mask,
<8 x c64> %passthrough)
llvm.masked.compressstore.* - Overloaded intrinsic to compressstore
complex under mask (not all variants
shown)
declare void @llvm.masked.compressstore.v4c32.p0v4c32(<4 x c32> %val,
c32* %ptr,...
2019 Oct 22
4
Complex proposal v3 + roundtable agenda
...<4 x c32> %passthrough)
declare v8c32 @llvm.masked.expandload.v8c64.p0v8c64(c64* %ptr,
<8 x i1> %mask,
<8 x c64> %passthrough)
llvm.masked.compressstore.* - Overloaded intrinsic to compressstore complex
under mask (not all variants shown)
declare void @llvm.masked.compressstore.v4c32.p0v4c32(<4 x c32> %val,
c32* %ptr,...
2020 Nov 12
0
Complex proposal v3 + roundtable agenda
...<4 x c32> %passthrough)
>
> declare v8c32 @llvm.masked.expandload.v8c64.p0v8c64(c64* %ptr,
> <8 x i1> %mask,
> <8 x c64> %passthrough)
>
> llvm.masked.compressstore.* - Overloaded intrinsic to compressstore complex
> under mask (not all variants shown)
>
> declare void @llvm.masked.compressstore.v4c32.p0v4c32(<4 x c32> %val,
> c32* %ptr,
>...