search for: complexpatterns

Displaying 20 results from an estimated 91 matches for "complexpatterns".

Did you mean: complexpattern
2007 Dec 31
2
[LLVMdev] ComplexPattern in child ISel nodes
...the root of the DAG to which it is directly attached. I would expect that N1 would be passed into ComplexPattern regardless of the larger DAG in which it's embedded. Was this intended behavior, a bug, or just the way it was done? The attached patch fundamentally changes the semantics of ComplexPatterns to always be passed the DAG node to which the ComplexPattern is an operand. If the current behavior is as designed, or needed for backwards compatibility I'll try to add an attribute to complex patterns to make this behavior optional. -- Christopher Lamb  -------------- next part ----...
2008 Jan 03
1
[LLVMdev] ComplexPattern in child ISel nodes
...>> Was this intended behavior, a bug, or just the way it was done? > > This is intended. I don't remember which, but I think some x86 > complexpattern matching code needs the root node. > >> >> The attached patch fundamentally changes the semantics of >> ComplexPatterns to always be passed the DAG node to which the >> ComplexPattern is an operand. If the current behavior is as >> designed, or needed for backwards compatibility I'll try to add an >> attribute to complex patterns to make this behavior optional. > > I don't see a...
2008 Jan 02
0
[LLVMdev] ComplexPattern in child ISel nodes
...ich > it's embedded. > > Was this intended behavior, a bug, or just the way it was done? This is intended. I don't remember which, but I think some x86 complexpattern matching code needs the root node. > > The attached patch fundamentally changes the semantics of > ComplexPatterns to always be passed the DAG node to which the > ComplexPattern is an operand. If the current behavior is as > designed, or needed for backwards compatibility I'll try to add an > attribute to complex patterns to make this behavior optional. I don't see a compelling reason fo...
2009 Jan 14
2
[LLVMdev] Use two ComplexPatterns (possible bug of TableGen?)
It seems that it's not allowed to two same 'ComplexPattern's in a 'def', because TableGen generate the same variable names for the two ComplexPatterns. If I understand the source code of TableGen correctly, it's not designed to use more than one ComplexPattern instance (no matter they are the same or not). In the following example, two 'regsw' are used to match the operands of mul. def regsw : Operand<v4i32>, Compl...
2010 Jan 19
1
[LLVMdev] ComplexPattern
Hi, I was wondering if someone could explain precisely what the ComplexPattern tablegen class does? Here's the first line of the definition (from TargetSelectionDAG.td) for reference: class ComplexPattern<ValueType ty, int numops, string fn, list<SDNode> roots = [], list<SDNodeProperty> props = [],
2009 Jan 14
0
[LLVMdev] Use two ComplexPatterns (possible bug of TableGen?)
Alex schrieb: > It seems that it's not allowed to two same 'ComplexPattern's in a 'def', > because TableGen generate the same variable names for the two ComplexPatterns. > If I understand the source code of TableGen correctly, it's not designed to > use more than one ComplexPattern instance (no matter they are the same or not). I've run into this too, the problem is that variables generated for the ComplexPattern get the same name(s). I have a patc...
2009 Jan 15
2
[LLVMdev] Use two ComplexPatterns (possible bug of TableGen?)
...tISelEmitter. I hope this is a starting point for you, florian ps: We have a working compiler here that relies on these changes, so it does not seem to break anything, at least for our private backend. -------------- next part -------------- A non-text attachment was scrubbed... Name: multiple-complexpatterns.patch Type: text/x-patch Size: 2958 bytes Desc: not available URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20090115/fe4ad532/attachment.bin>
2009 Jan 16
0
[LLVMdev] Use two ComplexPatterns (possible bug of TableGen?)
...if (InstPatNode && !InstPatNode->isLeaf() && + InstPatNode->getOperator()->getName() == "set") { because I'm unsure what it's for. When is a "set" node a leaf? BTW, the FastISelEmitter should be ignoring any instructions that have ComplexPatterns, so there shouldn't be a problem there. Also, it's only enabled for x86 right now. Dan
2010 Sep 07
0
[LLVMdev] MachineMemOperand and dependence information
On Sep 7, 2010, at 10:48 AM, Akira Hatanaka wrote: > I have two questions regarding MachineMemOperands and dependence information. > > Q1) I noticed that MachineMemOperands are lost when two LDRs are combined and a LDRD is generated in ARMPreAllocLoadStoreOpt:::RescheduleOps. > > (before optimization) > %reg1033<def> = LDR %reg1030, %reg0, 4100, pred:14, pred:%reg0;
2009 Jan 16
1
[LLVMdev] Use two ComplexPatterns (possible bug of TableGen?)
Hi Dan, thank you for applying the patch. > However, I didn't apply this part: > > - if (InstPatNode && InstPatNode->getOperator()->getName() == > "set") { > + if (InstPatNode && !InstPatNode->isLeaf() && > + InstPatNode->getOperator()->getName() == "set") { > > because I'm unsure what
2012 Sep 16
2
[LLVMdev] Pattern class
Has anybody used the Pattern class. We all use Pat and ComplexPattern but I can't find any examples of Pattern. I have some instructions that I'm currently treating as pseudos but I'd like to treat them as patterns with several instructions but this does not seem to work, at least I can't get it to work so far. I get an error: Cannot handle instructions with temporaries yet!
2013 Feb 02
2
[LLVMdev] OperandWithDefaultOps question
Is it possible to use this operand class in an instruction that has a pattern defined? If so, can you write it with anything besides a ComplexPattern in the instruction's pattern DAG, to set it to a value? Can you refer to it at all? Or would it be added to the MachineInstr with the default value such that you could modify it later in the backend? If there is a non-ComplexPattern way to write
2010 Sep 07
3
[LLVMdev] MachineMemOperand and dependence information
I have two questions regarding MachineMemOperands and dependence information. Q1) I noticed that MachineMemOperands are lost when two LDRs are combined and a LDRD is generated in ARMPreAllocLoadStoreOpt:::RescheduleOps. (before optimization) %reg1033<def> = LDR %reg1030, %reg0, 4100, pred:14, pred:%reg0; mem:LD4[%uglygep10] %reg1054<def> = LDR %reg1030, %reg0, 4104, pred:14,
2012 Sep 16
2
[LLVMdev] Pattern class
I'm interested in class Pattern. Classes Pat and ComplexPattern are used everywhere. ________________________________________ From: Triple Yang [triple.yang at gmail.com] Sent: Sunday, September 16, 2012 9:55 AM To: Kotler, Reed Cc: LLVM-Dev ‎[llvmdev at cs.uiuc.edu]‎ Subject: Re: [LLVMdev] Pattern class You might want to refer to lib/Target/Sparc/SparcInstrInfo.td for examples of both Pat
2010 Sep 07
1
[LLVMdev] MachineMemOperand and dependence information
Sorry, this is the part in ARMLoadStoreOptimizer.cpp that creates a LDRD instruction. Ops.pop_back(); Ops.pop_back(); // Form the pair instruction. if (isLd) { MachineInstrBuilder MIB = BuildMI(*MBB, InsertPos, dl, TII->get(NewOpc)) .addReg(EvenReg, RegState::Define)
2009 Mar 18
2
[LLVMdev] Selecting FrameIndex
Hi All I'm having nightmares with FrameIndexes during my backend development :( I have ComplexPatterns defined for my two addressing modes (RR and RI). Most of the time, FrameIndex operands appear to be on load/store nodes, in which case everything works fine as my custom addressing modes matchers work fine. Unfortunately, I now have an add node which has a FrameIndex operand (this results from a s...
2012 Sep 16
0
[LLVMdev] Pattern class
You might want to refer to lib/Target/Sparc/SparcInstrInfo.td for examples of both Pat and ComplexPattern. Regards. 2012/9/16 Kotler, Reed <rkotler at mips.com>: > Has anybody used the Pattern class. We all use Pat and ComplexPattern but I > can't find any examples of Pattern. > > I have some instructions that I'm currently treating as pseudos but I'd like > to
2018 Jun 07
2
Matching ConstantFPSDNode tablegen
I'm trying to match a ConstantFPSDNode == 0 in dag pattern for tablegen but am having some issues. So LLVM doesn't seem to accept a floating point constant literal match like: %v = call <4 x float> @foo(i32 15, float %s, float 0.0, <8 x i32> %rsrc, <4 x i32> %samp, i1 0, i32 0, i32 0) ret <4 x float> %v def : XXXPat<(v4f32 (int_foo i32:$mask, f32:$s, 0,
2016 Oct 11
2
RFC: Absolute or "fixed address" symbols as immediate operands
On Tue, Oct 11, 2016 at 2:48 PM, Chris Lattner <clattner at apple.com> wrote: > On Oct 11, 2016, at 12:04 AM, Peter Collingbourne <peter at pcc.me.uk> wrote: > > I have been experimenting with a number of approaches to representation in >> SDAG, and I have found one that seems to work best, and would be the least >> intrusive (unfortunately most approaches to this
2012 Oct 05
2
[LLVMdev] Compiling for several operand memories
Hello, My target has two data memories, each with its own load/store instructions but also has some instructions using both memories. I want to be able to access both memories in C-programs through the address space attribute. I have two ideas so far: Either: use two sets of addressing modes in InstrInfo.td: def ADDRrr_A : ComplexPattern<i16, 2, “SelectADDRrr_A", [], []>; def ADDRri :