search for: complexoperands

...this for every instruction is unrealistic. Not particularly. There are backends already in existence that make heavy use of it. The key is that def : Pat constructs can take advantage of all of the same mechanisms for factoring out commonality that normal patterns can, including multiclasses and ComplexOperands. --Owen

...n is unrealistic. > > Not particularly. There are backends already in existence that make > heavy use of it. The key is that def : Pat constructs can take > advantage of all of the same mechanisms for factoring out commonality > that normal patterns can, including multiclasses and ComplexOperands. [Villmow, Micah] Can you provide example of it having to occur everywhere? The instruction enum list for my backend 6867 enums long and growing. Now the proposed solution is I have to write a pattern/duplicate every single instruction so I can add a literal operand for every register operand and a...

...t;> >> Not particularly. There are backends already in existence that make >> heavy use of it. The key is that def : Pat constructs can take >> advantage of all of the same mechanisms for factoring out commonality >> that normal patterns can, including multiclasses and ComplexOperands. > [Villmow, Micah] Can you provide example of it having to occur everywhere? The instruction enum list for my backend 6867 enums long and growing. Now the proposed solution is I have to write a pattern/duplicate every single instruction so I can add a literal operand for every register operand...

> -----Original Message----- > From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] > On Behalf Of Owen Anderson > Sent: Tuesday, August 21, 2012 11:37 AM > To: Stellard, Thomas > Cc: llvmdev at cs.illinois.edu > Subject: Re: [LLVMdev] No more TargetFlags on MO_Register > MachineOperands > > Tom, > > On Aug 21, 2012, at 11:21 AM, Tom

Tom, On Aug 21, 2012, at 11:21 AM, Tom Stellard <thomas.stellard at amd.com> wrote: > I've been working on replacing the MachineOperand flags in the R600 > backend with immediate operands, but I can't figure out how to modify > the instruction patterns to make this work. For example, I have the class: > > class R600_1OP <bits<32> inst, string opName,