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2015 Jun 12
2
[LLVMdev] Register Allocation on IR
Hello all, I am trying to use the LLVM libraries to do register allocation on LLVM IR code -- and output IR as the result. There are two problems that arise when we try this : a. The LLVM backend requires that one goes through all the steps sequentially namely -- Instruction selection -- Scheduling and Formation -- SSA-based machine code optimizations -- Register
2015 Jun 15
2
[LLVMdev] Register Allocation on IR
...do, but I want to do > simulations on IR and getting a > register-allocated IR is useful for that purpose. > > ------------------------------ > View this message in context: Register Allocation on IR > <https://urldefense.proofpoint.com/v2/url?u=http-3A__llvm.1065342.n5.nabble.com_Register-2DAllocation-2Don-2DIR-2Dtp82414.html&d=AwMFaQ&c=8hUWFZcy2Z-Za5rBPlktOQ&r=Mfk2qtn1LTDThVkh6-oGglNfMADXfJdty4_bhmuhMHA&m=2OblNhBarTDXhb_DrXgPBErQpK4kzZPCqObSAYnWrNw&s=tieOG_IuhO0b9Eri02OVFdSWvkr0zlhF0WFyiUI1zkc&e=> > Sent from the LLVM - Dev mailing list archive >...