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Announcing the Release of TTA-Based Codesign Environment (TCE) v1.2 TTA-Based Codesign Environment (TCE) is a toolset for designing application-specific processors (ASP) based on the Transport Triggered Architecture (TTA). The toolset provides a complete codesign flow from C programs down to synthesizable VHDL and parallel program binaries....

TTA-Based Codesign Environment (TCE) v1.3 released -------------------------------------------------- TTA-Based Codesign Environment (TCE) is a toolset for designing application-specific processors (ASP) based on the Transport Triggered Architecture (TTA). The toolset provides a complete retargetable codesign flow f...

TTA-Based Codesign Environment (TCE) is a toolset for designing application-specific processors (ASP) based on the Transport Triggered Architecture (TTA). TTA is a minimalistic processor architecture template that allows high level of control for the designer to choose the boundary between the hardware and the softwa...

TTA-Based Codesign Environment (TCE) is a toolset for designing application-specific processors (ASP) based on the Transport Triggered Architecture (TTA). TTA is a minimalistic processor architecture template that allows high level of control for the designer to choose the boundary between the hardware and the softwa...

...M since doing a review of the technology for Apple in 2003. Hope to be using it for one of my own projects soon, so I will be attending the meeting in May to make sure I am current and to be able to connect names and coding styles with people. Efrem Lipkin Principal CoDesign elipkin at codesign.com 1811 Ward Street 510-845-3170 Berkeley, CA 94703 -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20070411/76...

On 28.02.2011, at 15:44, Tobias Grosser wrote: > On 02/28/2011 05:27 AM, Christian Plessl wrote: >> Hi everyone >> >> I am teaching a lecture on hardware/software codesign which, though not a dedicated compiler course, covers quite a bit of compiler related contents (general introduction, intermediate code, code generation). >> >> I'm currently considering replacing and/or extending this compiler related lecture parts with an introduction to LLVM as...

Hi everyone I am teaching a lecture on hardware/software codesign which, though not a dedicated compiler course, covers quite a bit of compiler related contents (general introduction, intermediate code, code generation). I'm currently considering replacing and/or extending this compiler related lecture parts with an introduction to LLVM as an example for a m...

On 02/28/2011 05:27 AM, Christian Plessl wrote: > Hi everyone > > I am teaching a lecture on hardware/software codesign which, though not a dedicated compiler course, covers quite a bit of compiler related contents (general introduction, intermediate code, code generation). > > I'm currently considering replacing and/or extending this compiler related lecture parts with an introduction to LLVM as an exampl...

Dear all, I would like to share a paper I co-authored with Prof. Alper Sen. This paper describes an algorithm to generate testbenches from SystemC models represented with LLVM IR. It was accepted and presented at International Conference on Hardware/Software Codesign and System Synthesis (CODES/ISSS), 2012. A link to the paper is accessible from acm or Alper's website: http://dl.acm.org/citation.cfm?id=2380498 http://www.cmpe.boun.edu.tr/~sen/publications.htm Moreover, I have formalized LLVM IR in Haskell/uuagc (Utrecht University Attribute Grammar Compile...

...; On 05/24/2011 05:18 AM, Christian Plessl wrote: > > > > On 28.02.2011, at 15:44, Tobias Grosser wrote: > > > >> On 02/28/2011 05:27 AM, Christian Plessl wrote: > >>> Hi everyone > >>> > >>> I am teaching a lecture on hardware/software codesign which, though not a dedicated compiler course, covers quite a bit of compiler related contents (general introduction, intermediate code, code generation). > >>> > >>> I'm currently considering replacing and/or extending this compiler related lecture parts with an introdu...

Hello! Does anyone get any idea how to generate a following graph by using R? http://www.fastcodesign.com/multisite_files/codesign/imagecache/inline-large/post-inline/inline-north-carolina-gay-rights.jpg Any information or hint will be highly appreciated. Kind regards, Henry [[alternative HTML version deleted]]

Hi all, I would like to propose an improvement of the “almost dead” block elimination in Transforms/Local.cpp so that it will preserve the canonical loop form for loops with a volatile iteration variable. *** Problem statement Nested loops in LCALS Subset B (https://codesign.llnl.gov/LCALS.php) are not vectorized with LLVM -O3 because the LLVM loop vectorizer fails the test whether the loop latch and exiting block of a loop is the same. The loops are vectorizable, and get vectorized with LLVM -O2 and also with other commercial compilers (icc, xlc). *** Details These l...

I tried the following on LULESH1.0 serial version ( https://codesign.llnl.gov/lulesh/LULESH.cc) 1. clang++ -O3 LULESH.cc; ./a.out 20 Runtime: 9.487353 second 2. clang++ -O0 -Xclang -disable-llvm-passes -c -emit-llvm -o a.bc LULESH.cc; opt -O3 a.bc -o b.bc; llc -O3 -filetype=obj b.bc -o b.o ; clang++ b.o -o b.out; ./b.out 20 Runtime: 24.15 seconds 3. clang++ -O3 -...

...2. You can disable the optnone function attribute behavior by passing "-Xclang -disable-O0-optnone" to clang ~Craig On Fri, Jan 5, 2018 at 1:19 PM, toddy wang via llvm-dev < llvm-dev at lists.llvm.org> wrote: > I tried the following on LULESH1.0 serial version ( > https://codesign.llnl.gov/lulesh/LULESH.cc) > > 1. clang++ -O3 LULESH.cc; ./a.out 20 > Runtime: 9.487353 second > > 2. clang++ -O0 -Xclang -disable-llvm-passes -c -emit-llvm -o a.bc > LULESH.cc; opt -O3 a.bc -o b.bc; llc -O3 -filetype=obj b.bc -o b.o ; > clang++ b.o -o b.out; ./b.out 20 > Ru...

...; wrote: > Dear all, > > I would like to share a paper I co-authored with Prof. Alper Sen. This > paper describes an algorithm to generate testbenches from SystemC > models represented with LLVM IR. It was accepted and presented at > International Conference on Hardware/Software Codesign and System > Synthesis (CODES/ISSS), 2012. A link to the paper is accessible from > acm or Alper's website: > http://dl.acm.org/citation.cfm?id=2380498 > http://www.cmpe.boun.edu.tr/~sen/publications.htm > > Moreover, I have formalized LLVM IR in Haskell/uuagc (Utrecht > U...

...i, Athens, Greece, July 12-13, 2004 WSEAS ELECTROSCIENCE AND TECHNOLOGY FOR NAVAL ENGINEERING and ALL-ELECTRIC SHIP ********************************************************** Copacabana, Rio de Janeiro, Brazil, October 12-15, 2004 3rd WSEAS Int.Conf. on INFORMATION SECURITY, HARDWARE/SOFTWARE CODESIGN and COMPUTER NETWORKS (ISCOCO 2004) 3rd WSEAS Int. Conf. on APPLIED MATHEMATICS and COMPUTER SCIENCE (AMCOS 2004) 3rd WSEAS Int.Conf. on SYSTEM SCIENCE and ENGINEERING (ICOSSE 2004) 4th WSEAS Int.Conf. on POWER ENGINEERING SYSTEMS (ICOPES 2004) ****************************************************...

It's really nice of you pointing out the -Xclang option, it makes things much easier. I really appreciate your help! Best, Peizhao On Mon, Apr 10, 2017 at 10:12 PM, Mehdi Amini <mehdi.amini at apple.com> wrote: > > On Apr 10, 2017, at 5:21 PM, Craig Topper via llvm-dev < > llvm-dev at lists.llvm.org> wrote: > > clang -O0 does not disable all optimization passes

...power consumpiton and performance these systems often require customized processors which are optimized for a specific application. However, designing an application specific processor can be time-consuming and costly, and therefore the toolset used for processor design has an important role. TTA Codesign Environment (TCE) is a semi-automated toolset developed at the Tampere University of Technology for designing processors based on an easily customizable Transport Triggered Architecture (TTA) processor architecture template. The toolset provides a complete co-design toolchain from program source co...

...> "-Xclang -disable-O0-optnone" to clang >> >> ~Craig >> >> On Fri, Jan 5, 2018 at 1:19 PM, toddy wang via llvm-dev < >> llvm-dev at lists.llvm.org> wrote: >> >>> I tried the following on LULESH1.0 serial version ( >>> https://codesign.llnl.gov/lulesh/LULESH.cc) >>> >>> 1. clang++ -O3 LULESH.cc; ./a.out 20 >>> Runtime: 9.487353 second >>> >>> 2. clang++ -O0 -Xclang -disable-llvm-passes -c -emit-llvm -o a.bc >>> LULESH.cc; opt -O3 a.bc -o b.bc; llc -O3 -filetype=obj b.bc -o b.o...

...n attribute behavior by passing > "-Xclang -disable-O0-optnone" to clang > > ~Craig > > On Fri, Jan 5, 2018 at 1:19 PM, toddy wang via llvm-dev < > llvm-dev at lists.llvm.org> wrote: > >> I tried the following on LULESH1.0 serial version ( >> https://codesign.llnl.gov/lulesh/LULESH.cc) >> >> 1. clang++ -O3 LULESH.cc; ./a.out 20 >> Runtime: 9.487353 second >> >> 2. clang++ -O0 -Xclang -disable-llvm-passes -c -emit-llvm -o a.bc >> LULESH.cc; opt -O3 a.bc -o b.bc; llc -O3 -filetype=obj b.bc -o b.o ; >> clang++ b.o...