Displaying 5 results from an estimated 5 matches for "codegenregisterclass".
2013 May 17
2
[LLVMdev] Types vs. register classes in instruction patterns -- effect on FastISel
...eligible for FastEmit_*. Stepping through the tablegen code
showed that we were rejecting them precisely because the patterns now
contain value types instead of register classes (FastISelEmitter.cpp,
lines 253ff.):
// For now, the only other thing we accept is register operands.
const CodeGenRegisterClass *RC = 0;
if (OpLeafRec->isSubClassOf("RegisterOperand"))
OpLeafRec = OpLeafRec->getValueAsDef("RegClass");
if (OpLeafRec->isSubClassOf("RegisterClass"))
RC = &Target.getRegisterClass(OpLeafRec);
else if (OpLeafRec->isSu...
2013 May 17
0
[LLVMdev] Types vs. register classes in instruction patterns -- effect on FastISel
...epping through the tablegen code
> showed that we were rejecting them precisely because the patterns now
> contain value types instead of register classes (FastISelEmitter.cpp,
> lines 253ff.):
>
> // For now, the only other thing we accept is register operands.
> const CodeGenRegisterClass *RC = 0;
> if (OpLeafRec->isSubClassOf("RegisterOperand"))
> OpLeafRec = OpLeafRec->getValueAsDef("RegClass");
> if (OpLeafRec->isSubClassOf("RegisterClass"))
> RC = &Target.getRegisterClass(OpLeafRec);
> else if...
2012 Dec 04
0
[LLVMdev] Visual Studio 2012 cl.exe ICE while building LLVM for x64 (in TableGen) at -O2
> On Behalf Of Nicholas Chapman
>
> On 04/12/2012 06:29, Michael Spencer wrote:
> > On Mon, Dec 3, 2012 at 8:08 PM, Gordon Keiser <gkeiser at arxan.com>
> wrote:
> >> As an update to this:
> >> http://connect.microsoft.com/VisualStudio/feedback/details/769222/cl-
> >> exe-ice-when-building-llvm-trunk-at-o2
> >>
> >> Microsoft
2012 Dec 04
3
[LLVMdev] Visual Studio 2012 cl.exe ICE while building LLVM for x64 (in TableGen) at -O2
On 04/12/2012 06:29, Michael Spencer wrote:
> On Mon, Dec 3, 2012 at 8:08 PM, Gordon Keiser <gkeiser at arxan.com> wrote:
>> As an update to this:
>> http://connect.microsoft.com/VisualStudio/feedback/details/769222/cl-exe-ice-when-building-llvm-trunk-at-o2
>>
>> Microsoft has reproduced the ICE, given a workaround, and is planning a fix for a future MSVC release.
2013 May 19
1
[LLVMdev] Types vs. register classes in instruction patterns -- effect on FastISel
...de
> > showed that we were rejecting them precisely because the patterns now
> > contain value types instead of register classes (FastISelEmitter.cpp,
> > lines 253ff.):
> >
> > // For now, the only other thing we accept is register operands.
> > const CodeGenRegisterClass *RC = 0;
> > if (OpLeafRec->isSubClassOf("RegisterOperand"))
> > OpLeafRec = OpLeafRec->getValueAsDef("RegClass");
> > if (OpLeafRec->isSubClassOf("RegisterClass"))
> > RC = &Target.getRegisterClass(OpLeafRec...