Displaying 12 results from an estimated 12 matches for "code_base".
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opcode_base
2014 Nov 19
5
[PATCH v2 0/3] nouveau: support for custom VRAM domains
This series is to allow NVIDIA chips with shared memory to operate more
efficiently (and to operate at all once we disable VRAM from the kernel
driver) by allowing nouveau_screen to specify a domain to use for objects
originally allocated into VRAM. If the domain is not overridden, the default
NOUVEAU_BO_VRAM is used. A NV_VRAM_DOMAIN() macro is then introduced to be
used in place of
2014 Nov 19
0
[PATCH v2 2/3] nvc0: use NV_VRAM_DOMAIN() macro
...a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
@@ -734,12 +734,12 @@ nvc0_program_upload_code(struct nvc0_context *nvc0, struct nvc0_program *prog)
if (!is_cp)
nvc0->base.push_data(&nvc0->base, screen->text, prog->code_base,
- NOUVEAU_BO_VRAM, NVC0_SHADER_HEADER_SIZE, prog->hdr);
+ NV_VRAM_DOMAIN(&screen->base), NVC0_SHADER_HEADER_SIZE, prog->hdr);
nvc0->base.push_data(&nvc0->base, screen->text, code_pos,
- NOUVEAU...
2014 Nov 19
1
[PATCH v2 2/3] nvc0: use NV_VRAM_DOMAIN() macro
...u/nvc0/nvc0_program.c
> +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
> @@ -734,12 +734,12 @@ nvc0_program_upload_code(struct nvc0_context *nvc0, struct nvc0_program *prog)
>
> if (!is_cp)
> nvc0->base.push_data(&nvc0->base, screen->text, prog->code_base,
> - NOUVEAU_BO_VRAM, NVC0_SHADER_HEADER_SIZE, prog->hdr);
> + NV_VRAM_DOMAIN(&screen->base), NVC0_SHADER_HEADER_SIZE, prog->hdr);
> nvc0->base.push_data(&nvc0->base, screen->text, code_pos,
> -...
2014 Nov 19
1
[PATCH v2 2/3] nvc0: use NV_VRAM_DOMAIN() macro
...ouveau/nvc0/nvc0_program.c
> +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
> @@ -734,12 +734,12 @@ nvc0_program_upload_code(struct nvc0_context *nvc0, struct nvc0_program *prog)
>
> if (!is_cp)
> nvc0->base.push_data(&nvc0->base, screen->text, prog->code_base,
> - NOUVEAU_BO_VRAM, NVC0_SHADER_HEADER_SIZE, prog->hdr);
> + NV_VRAM_DOMAIN(&screen->base), NVC0_SHADER_HEADER_SIZE, prog->hdr);
> nvc0->base.push_data(&nvc0->base, screen->text, code_pos,
> -...
2015 May 17
14
[PATCH 00/12] Tessellation support for nvc0
This is enough to enable tessellation support on nvc0. It seems to
work a lot better on my GF108 than GK208. I suspect that there's some
sort of scheduling shenanigans that need to be adjusted for
kepler+. Or perhaps some shader header things.
Even with the GF108, I still get occasional blue triangles in Heaven,
but I get a *ton* of them on the GK208 -- seemingly the same issue,
but it's
2014 Oct 27
4
[PATCH 0/3] nouveau: support for custom VRAM domains
This series is to allow NVIDIA chips with shared memory to operate more
efficiently (and to operate at all once we disable VRAM from the kernel
driver) by allowing nouveau_screen to specify a domain to use for objects
originally allocated into VRAM. If the domain is not overridden, the default
NOUVEAU_BO_VRAM is used. A NV_VRAM_DOMAIN() macro is then introduced to be
used in place of
2015 Jun 19
5
[PATCH v3 0/2] nouveau: support for custom VRAM domains
New revision of this patchset that prevents VRAM objects from being
allocated on VRAM-less systems like Tegra. This is required for Mesa
to work on such systems.
Changes since v2:
- Use vram_size to detect systems without VRAM and set the correct
domain instead of expecting each chip to set its domain explicitly.
Alexandre Courbot (2):
nouveau: support for custom VRAM domains
nvc0: use
2014 Jun 17
0
[PATCH try 2 2/2] gallium/nouveau: move pushbuf and fences to context
...gallium/drivers/nouveau/nv50/nv50_program.c
index 4744a3c..c489a0d 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_program.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_program.c
@@ -445,7 +445,7 @@ nv50_program_upload_code(struct nv50_context *nv50, struct nv50_program *prog)
}
prog->code_base = prog->mem->start;
- ret = nv50_tls_realloc(nv50->screen, prog->tls_space);
+ ret = nv50_tls_realloc(nv50, prog->tls_space);
if (ret < 0) {
nouveau_heap_free(&prog->mem);
return FALSE;
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_query.c b/src...
2014 Jun 17
2
[PATCH try 2 1/2] gallium/nouveau: decouple nouveau_fence implementation from screen
Signed-off-by: Maarten Lankhorst <maarten.lankhorst at canonical.com>
---
src/gallium/drivers/nouveau/nouveau_fence.c | 76 ++++++++++++-------------
src/gallium/drivers/nouveau/nouveau_fence.h | 22 +++++--
src/gallium/drivers/nouveau/nouveau_screen.c | 9 +++
src/gallium/drivers/nouveau/nouveau_screen.h | 14 ++---
src/gallium/drivers/nouveau/nv30/nv30_context.c | 4 +-
2014 Jun 21
3
[Mesa-dev] [PATCH try 2 2/2] gallium/nouveau: move pushbuf and fences to context
...v50_program.c
> index 4744a3c..c489a0d 100644
> --- a/src/gallium/drivers/nouveau/nv50/nv50_program.c
> +++ b/src/gallium/drivers/nouveau/nv50/nv50_program.c
> @@ -445,7 +445,7 @@ nv50_program_upload_code(struct nv50_context *nv50, struct nv50_program *prog)
> }
> prog->code_base = prog->mem->start;
>
> - ret = nv50_tls_realloc(nv50->screen, prog->tls_space);
> + ret = nv50_tls_realloc(nv50, prog->tls_space);
> if (ret < 0) {
> nouveau_heap_free(&prog->mem);
> return FALSE;
> diff --git a/src/gallium/driver...
2013 Sep 23
57
[PATCH RFC v13 00/20] Introduce PVH domU support
This patch series is a reworking of a series developed by Mukesh
Rathor at Oracle. The entirety of the design and development was done
by him; I have only reworked, reorganized, and simplified things in a
way that I think makes more sense. The vast majority of the credit
for this effort therefore goes to him. This version is labelled v13
because it is based on his most recent series, v11.
2014 Jun 16
2
[PATCH 1/2] gallium/nouveau: decouple nouveau_fence implementation from screen
Signed-off-by: Maarten Lankhorst <maarten.lankhorst at canonical.com>
---
src/gallium/drivers/nouveau/nouveau_fence.c | 76 ++++++++++++-------------
src/gallium/drivers/nouveau/nouveau_fence.h | 22 +++++--
src/gallium/drivers/nouveau/nouveau_screen.c | 9 +++
src/gallium/drivers/nouveau/nouveau_screen.h | 14 ++---
src/gallium/drivers/nouveau/nv30/nv30_context.c | 4