search for: code64

...--git a/arch/x86/boot/compressed/idt_handlers_64.S b/arch/x86/boot/compressed/idt_handlers_64.S > index bfb3fc5aa144..67ddafab2943 100644 > --- a/arch/x86/boot/compressed/idt_handlers_64.S > +++ b/arch/x86/boot/compressed/idt_handlers_64.S > @@ -75,3 +75,7 @@ SYM_FUNC_END(\name) > .code64 > > EXCEPTION_HANDLER boot_pf_handler do_boot_page_fault error_code=1 > + > +#ifdef CONFIG_AMD_MEM_ENCRYPT > +EXCEPTION_HANDLER boot_stage1_vc_handler vc_no_ghcb_handler error_code=1 Like the others boot_stage1_vc do_boot_stage1_vc ... -- Regards/Gruss, Boris. https://p...

.../* disable paging. */ + mov %cr0, %eax + btr $CR0_PG_BIT, %eax /* PG in CR0 */ + mov %eax, %cr0 + + /* disable long mode. */ + mov $MSR_EFER, %ecx + rdmsr + btr $8, %eax + wrmsr - /* Far return */ - lret + /* kernel jump */ + mov %ebx, %esi + jmp *%edi .code64 .align 4 -- -Gene

...desc); } diff --git a/arch/x86/boot/compressed/idt_handlers_64.S b/arch/x86/boot/compressed/idt_handlers_64.S index 36dee2f40a8b..b20e57504a94 100644 --- a/arch/x86/boot/compressed/idt_handlers_64.S +++ b/arch/x86/boot/compressed/idt_handlers_64.S @@ -68,3 +68,5 @@ SYM_FUNC_END(\name) .text .code64 + +EXCEPTION_HANDLER boot_page_fault do_boot_page_fault error_code=1 diff --git a/arch/x86/boot/compressed/misc.h b/arch/x86/boot/compressed/misc.h index 3a030a878d53..345c90fbc500 100644 --- a/arch/x86/boot/compressed/misc.h +++ b/arch/x86/boot/compressed/misc.h @@ -37,6 +37,9 @@ #define memptr u...

...t/compressed/idt_handlers_64.S b/arch/x86/boot/compressed/idt_handlers_64.S > index 3d86ab35ef52..bfb3fc5aa144 100644 > --- a/arch/x86/boot/compressed/idt_handlers_64.S > +++ b/arch/x86/boot/compressed/idt_handlers_64.S > @@ -73,3 +73,5 @@ SYM_FUNC_END(\name) > > .text > .code64 > + > +EXCEPTION_HANDLER boot_pf_handler do_boot_page_fault error_code=1 boot_page_fault do_boot_page_fault equivalent to the PF handler proper naming pls. Grepping "page_fault" would give you all then. > diff --git a/arch/x86/boot/compressed/misc.h b/arch/x86/boot/compress...

...l $~CR0_PG_FLAG, %eax - movl %eax, %cr0 + /* disable paging. */ + mov %cr0, %eax + btr $CR0_PG_BIT, %eax /* PG in CR0 */ + mov %eax, %cr0 + + /* disable long mode. */ + mov $MSR_EFER, %ecx + rdmsr + btr $8, %eax + wrmsr - /* Far return */ - lret + /* kernel jump */ + mov %ebx, %esi + jmp *%edi .code64 .align 4 -- 2.5.0

...007 -0400 @@ -0,0 +1,267 @@ + .text + +#include <xen/config.h> +#include <xen/multiboot.h> +#include <public/xen.h> +#include <asm/asm_defns.h> +#include <asm/desc.h> +#include <asm/page.h> +#include <asm/msr.h> + +#if defined(__x86_64__) + + .code64 + +#define GREG(x) %r##x +#define SAVED_GREG(x) saved_r##x(%rip) +#define DECLARE_GREG(x) saved_r##x: .quad 0 +#define SAVE_GREG(x) movq GREG(x), SAVED_GREG(x) +#define LOAD_GREG(x) movq SAVED_GREG(x), GREG(x) + +#define REF(x) x(%rip) + +#define RDMSR(ind, m)...

...opq %r13 + popq %r12 + popq %rbp + popq %rbx + popq %r11 + popq %r10 + popq %r9 + popq %r8 + popq %rax + popq %rcx + popq %rdx + popq %rsi + popq %rdi + + /* Remove error code and return */ + addq $8, %rsp + + iretq +SYM_FUNC_END(\name) + .endm + + .text + .code64 diff --git a/arch/x86/boot/compressed/misc.h b/arch/x86/boot/compressed/misc.h index 726e264410ff..062ae3ae6930 100644 --- a/arch/x86/boot/compressed/misc.h +++ b/arch/x86/boot/compressed/misc.h @@ -23,6 +23,7 @@ #include <asm/page.h> #include <asm/boot.h> #include <asm/bootparam....

...+ popq %rsi + popq %rdi + + /* Remove error code and return */ + addq $8, %rsp + + /* + * Make sure we return to __KERNEL_CS - the CS selector on + * the IRET frame might still be from an old BIOS GDT + */ + movq $__KERNEL_CS, 8(%rsp) + + iretq +SYM_FUNC_END(\name) + .endm + + .text + .code64 diff --git a/arch/x86/boot/compressed/misc.h b/arch/x86/boot/compressed/misc.h index 726e264410ff..062ae3ae6930 100644 --- a/arch/x86/boot/compressed/misc.h +++ b/arch/x86/boot/compressed/misc.h @@ -23,6 +23,7 @@ #include <asm/page.h> #include <asm/boot.h> #include <asm/bootparam....

...oot_idt_desc); } diff --git a/arch/x86/boot/compressed/idt_handlers_64.S b/arch/x86/boot/compressed/idt_handlers_64.S index eda50cbdafa0..8473bf88e64e 100644 --- a/arch/x86/boot/compressed/idt_handlers_64.S +++ b/arch/x86/boot/compressed/idt_handlers_64.S @@ -69,3 +69,7 @@ SYM_FUNC_END(\name) .code64 EXCEPTION_HANDLER boot_page_fault do_boot_page_fault error_code=1 + +#ifdef CONFIG_AMD_MEM_ENCRYPT +EXCEPTION_HANDLER boot_stage1_vc do_vc_no_ghcb error_code=1 +#endif diff --git a/arch/x86/boot/compressed/misc.h b/arch/x86/boot/compressed/misc.h index ea6174bad699..65da40777bc1 100644 --- a/arc...

...oot_idt_desc); } diff --git a/arch/x86/boot/compressed/idt_handlers_64.S b/arch/x86/boot/compressed/idt_handlers_64.S index f7f1ea66dcbf..330eb4e5c8b3 100644 --- a/arch/x86/boot/compressed/idt_handlers_64.S +++ b/arch/x86/boot/compressed/idt_handlers_64.S @@ -71,3 +71,7 @@ SYM_FUNC_END(\name) .code64 EXCEPTION_HANDLER boot_pf_handler do_boot_page_fault error_code=1 + +#ifdef CONFIG_AMD_MEM_ENCRYPT +EXCEPTION_HANDLER boot_stage1_vc_handler no_ghcb_vc_handler error_code=1 +#endif diff --git a/arch/x86/boot/compressed/misc.h b/arch/x86/boot/compressed/misc.h index 4e5bc688f467..0e3508c5c15c 100...

...oot_idt_desc); } diff --git a/arch/x86/boot/compressed/idt_handlers_64.S b/arch/x86/boot/compressed/idt_handlers_64.S index b20e57504a94..92eb4df478a1 100644 --- a/arch/x86/boot/compressed/idt_handlers_64.S +++ b/arch/x86/boot/compressed/idt_handlers_64.S @@ -70,3 +70,7 @@ SYM_FUNC_END(\name) .code64 EXCEPTION_HANDLER boot_page_fault do_boot_page_fault error_code=1 + +#ifdef CONFIG_AMD_MEM_ENCRYPT +EXCEPTION_HANDLER boot_stage1_vc do_vc_no_ghcb error_code=1 +#endif diff --git a/arch/x86/boot/compressed/misc.h b/arch/x86/boot/compressed/misc.h index 9840c82a39f1..eaa8b45ebccb 100644 --- a/arc...

...a/arch/x86/boot/compressed/idt_handlers_64.S b/arch/x86/boot/compressed/idt_handlers_64.S > index f7f1ea66dcbf..330eb4e5c8b3 100644 > --- a/arch/x86/boot/compressed/idt_handlers_64.S > +++ b/arch/x86/boot/compressed/idt_handlers_64.S > @@ -71,3 +71,7 @@ SYM_FUNC_END(\name) > .code64 > > EXCEPTION_HANDLER boot_pf_handler do_boot_page_fault error_code=1 > + > +#ifdef CONFIG_AMD_MEM_ENCRYPT > +EXCEPTION_HANDLER boot_stage1_vc_handler no_ghcb_vc_handler error_code=1 > +#endif > diff --git a/arch/x86/boot/compressed/misc.h b/arch/x86/boot/compressed/...

...a/arch/x86/boot/compressed/idt_handlers_64.S b/arch/x86/boot/compressed/idt_handlers_64.S > index f7f1ea66dcbf..330eb4e5c8b3 100644 > --- a/arch/x86/boot/compressed/idt_handlers_64.S > +++ b/arch/x86/boot/compressed/idt_handlers_64.S > @@ -71,3 +71,7 @@ SYM_FUNC_END(\name) > .code64 > > EXCEPTION_HANDLER boot_pf_handler do_boot_page_fault error_code=1 > + > +#ifdef CONFIG_AMD_MEM_ENCRYPT > +EXCEPTION_HANDLER boot_stage1_vc_handler no_ghcb_vc_handler error_code=1 > +#endif > diff --git a/arch/x86/boot/compressed/misc.h b/arch/x86/boot/compressed/...

...1,15 @@ #include <asm/page.h> #include <asm/irqflags.h> +#ifdef CONFIG_PARAVIRT +#include <asm/paravirt.h> +#else +#define ENABLE_INTERRUPTS(x) sti +#define DISABLE_INTERRUPTS(x) cli +#define INTERRUPT_RETURN iretq +#define SYSRETQ sysretq +#define SWAPGS swapgs +#endif .code64 #ifndef CONFIG_PREEMPT @@ -179,6 +188,7 @@ rff_trace: CFI_ENDPROC END(ret_from_fork) + /* * System call entry. Upto 6 arguments in registers are supported. * @@ -223,7 +233,7 @@ ENTRY(system_call) * No need to follow this irqs off/on section - it's straight * and short: */...

...1,15 @@ #include <asm/page.h> #include <asm/irqflags.h> +#ifdef CONFIG_PARAVIRT +#include <asm/paravirt.h> +#else +#define ENABLE_INTERRUPTS(x) sti +#define DISABLE_INTERRUPTS(x) cli +#define INTERRUPT_RETURN iretq +#define SYSRETQ sysretq +#define SWAPGS swapgs +#endif .code64 #ifndef CONFIG_PREEMPT @@ -179,6 +188,7 @@ rff_trace: CFI_ENDPROC END(ret_from_fork) + /* * System call entry. Upto 6 arguments in registers are supported. * @@ -223,7 +233,7 @@ ENTRY(system_call) * No need to follow this irqs off/on section - it's straight * and short: */...

...l/entry.S 2007-01-11 22:22:26.000000000 -0200 @@ -51,6 +51,13 @@ #include <asm/page.h> #include <asm/irqflags.h> +#ifdef CONFIG_PARAVIRT +#include <asm/paravirt.h> +#else +#define ENABLE_INTERRUPTS(x) sti +#define DISABLE_INTERRUPTS(x) cli +#define SYSRETQ sysretq +#endif .code64 #ifndef CONFIG_PREEMPT @@ -179,6 +186,7 @@ rff_trace: CFI_ENDPROC END(ret_from_fork) + /* * System call entry. Upto 6 arguments in registers are supported. * @@ -223,7 +231,7 @@ ENTRY(system_call) * No need to follow this irqs off/on section - it's straight * and short: */...

...l/entry.S 2007-01-11 22:22:26.000000000 -0200 @@ -51,6 +51,13 @@ #include <asm/page.h> #include <asm/irqflags.h> +#ifdef CONFIG_PARAVIRT +#include <asm/paravirt.h> +#else +#define ENABLE_INTERRUPTS(x) sti +#define DISABLE_INTERRUPTS(x) cli +#define SYSRETQ sysretq +#endif .code64 #ifndef CONFIG_PREEMPT @@ -179,6 +186,7 @@ rff_trace: CFI_ENDPROC END(ret_from_fork) + /* * System call entry. Upto 6 arguments in registers are supported. * @@ -223,7 +231,7 @@ ENTRY(system_call) * No need to follow this irqs off/on section - it's straight * and short: */...

Hi, here is the first public post of the patch-set to enable Linux to run under SEV-ES enabled hypervisors. The code is mostly feature-complete, but there are still a couple of bugs to fix. Nevertheless, given the size of the patch-set, I think it is about time to ask for initial feedback of the changes that come with it. To better understand the code here is a quick explanation of SEV-ES first.

Hi, here is the first public post of the patch-set to enable Linux to run under SEV-ES enabled hypervisors. The code is mostly feature-complete, but there are still a couple of bugs to fix. Nevertheless, given the size of the patch-set, I think it is about time to ask for initial feedback of the changes that come with it. To better understand the code here is a quick explanation of SEV-ES first.

[ This patch depends on the cross-architecture ELF cleanup patch. ] This series updates the boot protocol to 2.07 and uses it to implement paravirtual booting. This allows the bootloader to tell the kernel what kind of hardware/pseudo-hardware environment it's coming up under, and the kernel can use the appropriate boot sequence code. Specifically: - Update the boot protocol to 2.07, which