search for: code16

...s to make it cope with other > > forms of relaxation where necessary. > > And if not, please open a bug :-) http://llvm.org/bugs/show_bug.cgi?id=22662 FWIW I could reproduce the 'movl foo, %ebx' one but a relative jump *was* using 16 bits (although gas uses 8): $ cat foo.S .code16 jae foo movl (foo), %ebx foo: $ gcc -c -oa.out foo.S ; llvm-objdump -d -triple=i686-pc-linux-code16 a.out: file format ELF64-x86-64 Disassembly of section .text: .text: 0: 73 05 jae 5 2: 66 8b 1e 00 00 mov...

On Fri, 2015-02-20 at 16:05 +0000, David Woodhouse wrote: > > It's been a while since I looked at this... but I think for the short > jumps we just emit the 8-bit version and there's a fixup which can go > back and re-emit the instruction in 32-bit mode if it finds it doesn't > fit? > > Do we just need to support a similar fixup for promoting 16-bit to >

Here's a brief update on the current state of 16-bit x86 support... The assembler has support for the .code16 directive and can happily output 16-bit code. In pending patches¹ I have also added an i386-*-*-code16 triple and fixed the disassembler to support 16-bit mode (which was previously present, but could not be invoked and was fairly broken). And added a '-m16' option to clang. The main cavea...

When experimenting with compiling GRUB2 with clang using integrated as, I found out that it generates a 16-bit code bigger than gas counterpart and result gets too big for size constraints of bootsector. This was traced mainly to 2 problems. 32-bit access to 16-bit addresses. source: movl LOCAL(kernel_sector), %ebx movl %ebx, 8(%si) clang: 7cbc: 67 66 8b 1d 5c 7c 00 addr32 mov 0x7c5c,%ebx

On 20.02.2015 16:38, David Woodhouse wrote: > On Fri, 2015-02-20 at 15:58 +0100, Vladimir 'φ-coder/phcoder' Serbinenko > wrote: >> When experimenting with compiling GRUB2 with clang using integrated as, >> I found out that it generates a 16-bit code bigger than gas counterpart >> and result gets too big for size constraints of bootsector. This was >> traced

...om> wrote: > Absolutely fantastic work, David. Thank you! > > On Jan 14, 2014, at 4:35 AM, David Woodhouse <dwmw2 at infradead.org> wrote: > > > Here's a brief update on the current state of 16-bit x86 support... > > > > The assembler has support for the .code16 directive and can happily > > output 16-bit code. In pending patches¹ I have also added an > > i386-*-*-code16 triple and fixed the disassembler to support 16-bit mode > > (which was previously present, but could not be invoked and was fairly > > broken). And added a '-m...

...=3 -msoft-float -fno-exceptions -fno-asynchronous-unwind-tables -fno-strict-aliasing -falign-functions=0 -falign-jumps=0 -falign-labels=0 -falign-loops=0 -mpreferred-stack-boundary=2 -mincoming-stack-boundary=2 -g -W -Wall -Wstrict-prototypes -Wno-clobbered -Werror -Wno-sign-compare -g -include code16.h -nostdinc -iwithprefix include -I. -I.. -I../libfat -I ../libinstaller -I ../libinstaller/getopt -D__MSDOS__ -c -o syslxopt.o ../libinstaller/syslxopt.c cc1: warnings being treated as errors ../libinstaller/syslxopt.c: In function 'usage': ../libinstaller/syslxopt.c:117: error: enumerat...

...review if you wouldn't > mind. I have done so. I've since worked out that the signed 16-bit relocation is probably entirely pointless and I should just drop the assert() from the first patch in the series, and drop the second patch entirely. And I've gone a little further and have .code16 actually working for the "test" case which provoked me into looking at it in the first place. But since nobody's responded, it didn't seem worth spamming the list with another series just yet. I'll update my git tree at http://git.infradead.org/users/dwmw2/llvm.git -- dwmw2...

When we add -ffreestanding the compiler won't get to inline this any more. Signed-off-by: David Woodhouse <dwmw2 at infradead.org> --- com32/lib/math/fabs.S | 15 +++++++++++++++ mk/lib.mk | 2 +- 2 files changed, 16 insertions(+), 1 deletion(-) create mode 100644 com32/lib/math/fabs.S diff --git a/com32/lib/math/fabs.S b/com32/lib/math/fabs.S new file mode 100644 index

...<dwmw2 at infradead.org> wrote: > This attempts to address http://llvm.org/bugs/show_bug.cgi?id=18220 > It also fixes a test which was requiring the *wrong* output. > > I'm relatively happy with this part, and it even solves most of the hard > part of feature request for .code16 in bug 8684 — which was actually why > I started prodding at this. But I could do with some help with the > 16-bit signed relocation handling, which I've split into a subsequent > patch. > > diff --git a/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp > b/lib/Target/X86/MCTar...

This attempts to address http://llvm.org/bugs/show_bug.cgi?id=18220 It also fixes a test which was requiring the *wrong* output. I'm relatively happy with this part, and it even solves most of the hard part of feature request for .code16 in bug 8684 — which was actually why I started prodding at this. But I could do with some help with the 16-bit signed relocation handling, which I've split into a subsequent patch. diff --git a/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp b/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp...

...0.10428 mapping.code.C 0.0212706 0.0173734 1.224 0.23971 mapping.code13:Subject.n.L -0.0154836 0.0245697 -0.630 0.53805 mapping.code14:Subject.n.L -0.0642852 0.0245697 -2.616 0.01945 * mapping.code15:Subject.n.L -0.0001106 0.0245697 -0.005 0.99647 mapping.code16:Subject.n.L -0.0268560 0.0245697 -1.093 0.29162 --- Signif. codes: 0 '***' 0.001 '**' 0.01 '*' 0.05 '.' 0.1 ' ' 1 Residual standard error: 0.04914 on 15 degrees of freedom Multiple R-Squared: 0.7207, Adjusted R-squared: 0.4227 F-statistic: 2.41...

On Oct 7, 2014, at 2:26 PM, Tim Northover <t.p.northover at gmail.com> wrote: > Hi Dmitry, > > On 7 October 2014 10:50, Dmitry Borisenkov <d.borisenkov at samsung.com> wrote: >> fpfail.s:26: Error: invalid instruction suffix for `ret' >> >> I downloaded Intel manual and haven’t found any mention of retl instruction, > > "retl" is the

I believe I have now fixed the 0x64 0xa1 0x00 0x00 0x00 0x00 bug in r199364. On Wed, Jan 15, 2014 at 10:53 AM, Craig Topper <craig.topper at gmail.com>wrote: > To fix it we need to change offset8/offset16/etc to have two suboperands > and update the printer to understand that. Also update the disassembler to > add the segment to the MCInst when its creating it. When I did these

...ASCII_MARKER1 s:vararg .ascii \s .endm #else /* DEBUG_MARKER1 */ .macro ASCII_MARKER1 s:vararg .endm #endif /* DEBUG_MARKER1 */ #ifdef DEBUG_LOADE .macro LOADE r:req, t:req movw (e_\r), %\t .endm #else /* DEBUG_LOADE */ .macro LOADE r:req, t:req popw %\t .endm #endif /* DEBUG_LOADE */ .code16 .text entry = 0x7c00 stack = (entry) e0_ax = (stack-2) e0_cx = (stack-4) e0_dx = (stack-6) e0_bx = (stack-8) e0_sp = (stack-10) e0_bp = (stack-12) e0_si = (stack-14) e0_di = (stack-16) e0_bot = (stack-16) e_di = (e0_bot-2) /* Original register values from entry point */ e_es = (e0_bo...

...atforms. Pertinent changes are sprinkled through *.mk and Makefile in the syslinux tree. This patch implements architecture-dependent code in memdisk to support for i386 and x86_64. The memcpy, memset and memmove routines originated from klibc. The assembler directive in memdump/code16.h is fixed for x86_64 build. Archicture-dependent get_cpuid in sysdump/cpuid is fixed. Console input initiated by com32 modules and sample programs hang on both i386 and x86_64. The issue is traced to the implementation of get_key() underlying firmware. For stdin file descriptor...

...dd if=$DEV of=mbr-backup.bin bs=440 count=1 + # write diagnostic MBR to device + sudo dd if=mbr-diag.bin of=$DEV + # example: test in a virtual machine (uses sudo because it is accessing raw device) + sudo kvm -m 128 -hda $DEV + # restore original MBR + sudo dd if=mbr-backup.bin of=$DEV + +*/ + + .code16 /* generate 16-bit code. doc: 9.13.12 */ + .text /* sub-section (default 0). doc: 7.109 */ + +video_page = 0x462 /* I/O port for video controller page selection (bitmask 0x07) */ +flag_active = 0x80 /* partition table entry active (bootable) flag */ + +stack = 0x7C00 /* top of st...

...-------------- */ /* * Modified MBR code used on an ISO image in hybrid mode. * * This doesn't follow the El Torito spec at all -- it is just a stub * loader of a hard-coded offset, but that's good enough to load * ISOLINUX. */ #define DEBUG_PRINT 1 #include "adjust.h" .code16 .text HYBRID_MAGIC = 0x7078c0fb isolinux_hybrid_signature = 0x7c00+64 isolinux_start_hybrid = 0x7c00+64+4 .globl bootsec /* Important: the top 6 words on the stack are passed to isolinux.bin */ stack = 0x7c00 partoffset = (stack-8) driveno = (stack-14) heads = (stack-16) sectors = (stack...

...=$DEV of=mbr-backup.bin bs=440 count=1 + # write diagnostic MBR to device + sudo dd if=mbr-diagnostic.bin of=$DEV + # example: test in a virtual machine (uses sudo because it is accessing raw device) + sudo kvm -m 128 -hda $DEV + # restore original MBR + sudo dd if=mbr-backup.bin of=$DEV + +*/ + + .code16 /* generate 16-bit code. doc: 9.13.12 */ + .text /* sub-section (default 0). doc: 7.109 */ + +video_page = 0x462 /* I/O port for video controller page selection (bitmask 0x07) */ +flag_active = 0x80 /* partition table entry active (bootable) flag */ + +stack = 0x7C00 /* top of st...

...2/include diff --git a/memdump/Makefile b/memdump/Makefile index e56c7bd..6a30431 100644 --- a/memdump/Makefile +++ b/memdump/Makefile @@ -15,7 +15,8 @@ ## topdir = .. -include $(topdir)/MCONFIG.embedded +MAKEDIR = $(topdir)/mk +include $(MAKEDIR)/embedded.mk OPTFLAGS = INCLUDES = -include code16.h -I. diff --git a/MCONFIG.build b/mk/build.mk similarity index 97% rename from MCONFIG.build rename to mk/build.mk index d1abff2..0ca82be 100644 --- a/MCONFIG.build +++ b/mk/build.mk @@ -14,7 +14,7 @@ ## Right now we don't distinguish between "build" system and the "host"...