Displaying 7 results from an estimated 7 matches for "codasip".
2015 Aug 27
2
Proposal to add a project to "Projects built with LLVM" - Codasip Studio
...ave a proposal for adding a project to the page http://llvm.org/ProjectsWithLLVM/.
We successfully use LLVM as a base for a retargetable compiler and below is some information on the project.
If you would have any comments, questions or if we should improve the text below, please let me know.
---
Codasip Studio
By Codasip Ltd. (link https://www.codasip.com/)
Codasip Studio is a highly automated development environment that covers all aspects of Application Specific Instruction-set Processor (ASIP) design including LLVM-based C/C++ compiler generation.
Starting with a high-level description of a...
2014 Jun 10
6
[LLVMdev] Suggestions for optimizations
...know when will we get to it, so I am posing it here,
so someone who would be interested in it can take a look at it.
Best regards
Adam Husar
P.S.: Also, if someone would be interested in our automatically generated
LLVM backend, you can contact me,
or you can find additional details at www.codasip.com. We also provide a
free academical license.
2019 May 03
2
RFC: On removing magic numbers assuming 8-bit bytes
On Thu, 2019-05-02 at 19:54 +0200, Pavel Šnobl wrote:
> Hi Jesper,
>
> thank you for working on this. My company (Codasip) would definitely
> be interested in having this feature upstream. I think that this is
> actually important for a suprisingly large number of people who
> currently have to maintain their changes downstream. I have a couple
> of questions and comments:
>
> 1. Do you plan on supp...
2016 May 10
3
[llvm dev] do we have allocator hook to use maximum different registers?
Hi,
Default register allocator tries to reuse the same registers over and
over again even if register file have a plenty of registers to use.
This creates parasite false dependencies and makes scheduling less
effective.
How to instruct allocator (may be override some virtual function in
mine backend?) that it is profitable to use maximum number of
available registers with minimal dependencies?
2019 May 02
12
RFC: On removing magic numbers assuming 8-bit bytes
A. This RFC outlines a proposal regarding non-8-bit-byte support that
got positive reception at a Round Table at EuroLLVM19. The general
topic has been brought up several times before and one good overview
can be found in a FOSDEM 2017 presentation by Jones and Cook:
https://archive.fosdem.org/2017/schedule/event/llvm_16_bit/
In a nutshell, the proposal is for the llvm community
2016 Mar 23
5
Open Project : Inter-procedural Register Allocation [GSoC 2016]
> On Mar 22, 2016, at 6:04 PM, Matthias Braun via llvm-dev <llvm-dev at lists.llvm.org> wrote:
>
> No need to apologize this thread surely deserved some answers :)
>
> From my perspective this project sounds doable. I would expect the register allocation parts to be not too hard: I imagine this being just distilling a new clobber regmask after allocating a function. I would
2013 Feb 14
1
[LLVMdev] LiveIntervals analysis problem
...ils few passes after
my pass.
Some suggestions?
Greetings,
Tom
P.S.: I work with LLVM 3.2 release.
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; ModuleID = '../../../../../newlib/newlib/libc/stdlib/ldtoa.c'
target datalayout = "e-p:32:32:32-S32-a0:0:32-n32"
target triple = "codasip"
%struct._reent = type { i32, %struct.__sFILE*, %struct.__sFILE*, %struct.__sFILE*, i32, [25 x i8], i32, i8*, i32, void (%struct._reent*)*, %struct._Bigint*, i32, %struct._Bigint*, %struct._Bigint**, i32, i8*, %union.anon.0, %struct._atexit*, %struct._atexit, void (i32)**, %struct._glue, [3 x...