Displaying 8 results from an estimated 8 matches for "coalescerpair".
2017 Apr 24
3
Debugging UNREACHABLE "Couldn't join subrange" in RegisterCoalescer (out-of-tree backend)
...c5)
#7 0x00000000026d4c42 bindingsErrorHandler(void*, std::string const&, bool) /d/en/johnsoni-0/gctools/llvm/lib/Support/ErrorHandling.cpp:127:0
#8 0x0000000001fdbc85 (anonymous namespace)::RegisterCoalescer::joinSubRegRanges(llvm::LiveRange&, llvm::LiveRange&, llvm::LaneBitmask, llvm::CoalescerPair const&) /d/en/johnsoni-0/gctools/llvm/lib/CodeGen/RegisterCoalescer.cpp:2695:0
#9 0x0000000001fdc3df (anonymous namespace)::RegisterCoalescer::mergeSubRangeInto(llvm::LiveInterval&, llvm::LiveRange const&, llvm::LaneBitmask, llvm::CoalescerPair&) /d/en/johnsoni-0/gctools/llvm/lib/Co...
2013 May 31
2
[LLVMdev] Register coalescer and reg_sequence (virtual super-regs)
...a
register with sub registers. When making coalescing decisions it thinks
that the virtual super reg interferes with sub reg instances, even though
in reality they shouldn't conflict. That is, they are individual registers
and would be better compared as such for register coalescing decisions
(CoalescerPair::Partial = 0).
For example, I have a super reg that has r20, r21, r22, and r23 physical
registers. This super reg is the dest of a reg_sequence which generates 4
COPY MIs. The first COPY coalesces (merging into r20), but the vregs for
r21-r23 (SUPER_RC:%vreg50:subreg1..subreg3) are never coalesced...
2013 May 31
0
[LLVMdev] Register coalescer and reg_sequence (virtual super-regs)
...a register with sub registers. When making coalescing decisions it thinks that the virtual super reg interferes with sub reg instances, even though in reality they shouldn't conflict. That is, they are individual registers and would be better compared as such for register coalescing decisions (CoalescerPair::Partial = 0).
>
> For example, I have a super reg that has r20, r21, r22, and r23 physical registers. This super reg is the dest of a reg_sequence which generates 4 COPY MIs. The first COPY coalesces (merging into r20), but the vregs for r21-r23 (SUPER_RC:%vreg50:subreg1..subreg3) are never...
2010 Oct 03
1
[LLVMdev] [LLVMDev] Coalescing Registers
I want to full understand register coalescing and how to coalesce
copies. From what I have seen from "SimpleRegisterCoalescing,"
"RegAllocLinearSpan," and "RegAllocPBQP" there are three indicators
for the copy instruction x = copy y. Assume that the value number of x
does not equal the value number of y.
For "x = copy y", let the boolean values a,b, and c,
2013 May 31
2
[LLVMdev] Register coalescer and reg_sequence (virtual super-regs)
...registers. When making coalescing decisions it thinks
> that the virtual super reg interferes with sub reg instances, even though
> in reality they shouldn't conflict. That is, they are individual registers
> and would be better compared as such for register coalescing decisions
> (CoalescerPair::Partial = 0).
> >
> > For example, I have a super reg that has r20, r21, r22, and r23 physical
> registers. This super reg is the dest of a reg_sequence which generates 4
> COPY MIs. The first COPY coalesces (merging into r20), but the vregs for
> r21-r23 (SUPER_RC:%vreg50:sub...
2010 Jun 15
4
[LLVMdev] Simpler subreg ops in machine code IR
...Y %reg1060:ssub_2<kill>
It will also replace the TargetInstrInfo::copyRegToReg hook when copying virtual registers:
%reg1050 = COPY %reg1044<kill>
It will be lowered with a TII.copyRegToReg() call in LowerSubregsInstructionPass (which may need renaming).
Why?
1. The new function CoalescerPair::isMoveInstr() can correctly determine if a MachineInstr is a (partial) register copy with source and destination registers and subreg indices. I think that is the only place it is done correctly currently. Weird stuff like subreg indices on EXTRACT_SUBREG operands is pretty hard to figure out. The...
2010 Jun 16
0
[LLVMdev] Simpler subreg ops in machine code IR
...instructions. For example, it's hard for me to read
%reg1045:sub_32bit<def> = COPY %reg1044<kill>
as updating part of reg1045. It's solvable by pretty printing COPY instructions that include register class information.
>
>
> Why?
>
>
> 1. The new function CoalescerPair::isMoveInstr() can correctly determine if a MachineInstr is a (partial) register copy with source and destination registers and subreg indices. I think that is the only place it is done correctly currently. Weird stuff like subreg indices on EXTRACT_SUBREG operands is pretty hard to figure out. The...
2011 May 06
0
[LLVMdev] Question about linking llvm-mc when porting a new backend
...t; >&)in
libLLVMSelectionDAG.a(InstrEmitter.cpp.o)
llvm::LiveStacks::getOrCreateInterval(int, llvm::TargetRegisterClass
const*)in libLLVMCodeGen.a(PreAllocSplitting.cpp.o)
llvm::VirtRegAuxInfo::CalculateRegClass(unsigned int)in
libLLVMCodeGen.a(CalcSpillWeights.cpp.o)
llvm::CoalescerPair::setRegisters(llvm::MachineInstr const*)in
libLLVMCodeGen.a(RegisterCoalescer.cpp.o)
llvm::CoalescerPair::setRegisters(llvm::MachineInstr const*)in
libLLVMCodeGen.a(RegisterCoalescer.cpp.o)
"llvm::TargetData::getCallFrameTypeAlignment(llvm::Type const*) const",
referenced from:...