search for: cntv_cval

...nterrupt is also forwarded to my guest. At this point, my RTOS's IRQ service routine is invoked which among other things reads GICV_IAR register to acknowledge the interrupt and then re-enables IRQs (to support nested interrupts) before calling the timer handler which is suppose to program the CNTV_CVAL register for the next tick. I notice that as soon as interrupts are re-enabled, the ISR is interrupted and the IRQ service routine is called again. However, this time GICV_IAR register returns 1023. Once the ISR detects a spurious interrupt and returns, it gets interrupted again with another spurio...

This round implements all of the review comments from V2 and all patches are now acked. Unless there are any objections I intend to apply later this morning. Ian.

First off, Apologies for the massive patch series... This series boots a 32-bit dom0 kernel to a command prompt on an ARMv8 (AArch64) model. The kernel is the same one as I am currently using with the 32 bit hypervisor I haven''t yet tried starting a guest or anything super advanced like that ;-). Also there is not real support for 64-bit domains at all, although in one or two places I