Displaying 2 results from an estimated 2 matches for "cmpxchgq".
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cmpxchg
2013 Sep 23
0
[LLVMdev] Wrong types in inline assembly?
..., new_first) != first);
return !first;
}
The generated code in the IR for the cmpxchg call is:
%struct.llist_node = type { %struct.llist_node* }
%tmp8 = tail call %struct.llist_node* asm sideeffect ".pushsection
.smp_locks,\22a\22\0A.balign 4\0A.long 671f -
.\0A.popsection\0A671:\0A\09lock; cmpxchgq $2,$1",
"={ax},=*m,r,0,*m,~{memory},~{dirflag},~{fpsr},~{flags}"(i64* %tmp2,
%struct.llist_node* %tmp7, %struct.llist_node* %entry.0, i64* %tmp2)
Can someone explain how cmpxchg can receive a struct type? That seems
a potential bug to me.
Moreover, shouldn't there be bitcasts f...
2014 Mar 07
3
[LLVMdev] [RFC] Add second "failure" AtomicOrdering to cmpxchg instruction
...b/test/CodeGen/X86/atomic64.ll
@@ -183,7 +183,7 @@ define void @atomic_fetch_umin64(i64 %x) nounwind {
}
define void @atomic_fetch_cmpxchg64() nounwind {
- %t1 = cmpxchg i64* @sc64, i64 0, i64 1 acquire
+ %t1 = cmpxchg i64* @sc64, i64 0, i64 1 acquire acquire
; X64: lock
; X64: cmpxchgq
; X32: lock
diff --git a/test/CodeGen/X86/atomic6432.ll b/test/CodeGen/X86/atomic6432.ll
index 31e66c8..c0f7267 100644
--- a/test/CodeGen/X86/atomic6432.ll
+++ b/test/CodeGen/X86/atomic6432.ll
@@ -184,7 +184,7 @@ define void @atomic_fetch_umin64(i64 %x) nounwind {
}
define void @atomic_f...