search for: cmpxchgl

It would be useful if you can post some example code and what you think the assembly code should look like. On Mar 26, 2009, at 5:41 PM, Robert Schuster wrote: > Hi, > I have reworked my previous example and got something which is > accepted > by tblgen: > > let isCall = 1, > Defs = [R0, R1, R2, R3, R12, LR, > D0, D1, D2, D3, D4, D5, D6, D7, CPSR] in { >

...line double qCos_x86(double a) { 3.2 Multiple specs in inline assembler: --- src/corelib/arch/qatomic_i386.h 2006-11-27 20:26:05.000000000 +0300 +++ src/corelib/arch/qatomic_i386.h 2006-12-15 01:45:07.097471758 +0300 @@ -36,7 +36,7 @@ asm volatile("lock\n" "cmpxchgl %2,%3\n" "sete %1\n" - : "=a" (newval), "=qm" (ret) + : "=a" (newval), "=m" (ret) : "r" (newval), "m" (*ptr), "0" (expected) : &...

On 10 May 2014, at 13:53, Tim Northover <t.p.northover at gmail.com> wrote: > It doesn't make sense for everything though, particularly if you want > target-specific IR to simply not exist. What would you map ARM's > "ldrex" to on x86? This isn't a great example. Having load-linked / store-conditional in the IR would make a number of transforms related to

Hi Andrew, This series of patches lays the basic ground work for the paravirtualized kernel patches coming later on. I think this lot is ready for the rough-and-tumble world of the -mm tree. The main change from the last posting is that all the page-table related patches have been moved out, and will be posted separately. Also, the off-by-one in reserving the top of address space has been

Hi Andrew, This series of patches lays the basic ground work for the paravirtualized kernel patches coming later on. I think this lot is ready for the rough-and-tumble world of the -mm tree. The main change from the last posting is that all the page-table related patches have been moved out, and will be posted separately. Also, the off-by-one in reserving the top of address space has been

...: "=r" (td)); (kgdb) list *0xc06fd937 0xc06fd937 is in getnewbuf (atomic.h:149). 144 static __inline int 145 atomic_cmpset_int(volatile u_int *dst, u_int exp, u_int src) 146 { 147 int res = exp; 148 149 __asm __volatile ( 150 " " __XSTRING(MPLOCKED) " " 151 " cmpxchgl %2,%1 ; " 152 " setz %%al ; " 153 " movzbl %%al,%0 ; " (kgdb) bt #0 doadump () at pcpu.h:165 #1 0xc06b25fe in boot (howto=260) at /usr/src/sys/kern/kern_shutdown.c:409 #2 0xc06b2955 in panic (fmt=0xc0976f0c "%s") at /usr/src/sys/kern/kern_shutdown.c:56...

...b/test/CodeGen/X86/atomic32.ll @@ -243,7 +243,7 @@ define void @atomic_fetch_umin32(i32 %x) nounwind { } define void @atomic_fetch_cmpxchg32() nounwind { - %t1 = cmpxchg i32* @sc32, i32 0, i32 1 acquire + %t1 = cmpxchg i32* @sc32, i32 0, i32 1 acquire acquire ; X64: lock ; X64: cmpxchgl ; X32: lock diff --git a/test/CodeGen/X86/atomic64.ll b/test/CodeGen/X86/atomic64.ll index aa00045..4f55edc 100644 --- a/test/CodeGen/X86/atomic64.ll +++ b/test/CodeGen/X86/atomic64.ll @@ -183,7 +183,7 @@ define void @atomic_fetch_umin64(i64 %x) nounwind { } define void @atomic_fetch_cmp...

[ REPOST: Apologies to anyone who has seen this before. It didn't make it onto any of the lists it should have. -J ] Hi Andrew, This series of patches lays the basic ground work for the paravirtualized kernel patches coming later on. I think this lot is ready for the rough-and-tumble world of the -mm tree. For the most part, these patches do nothing or very little. The patches should

[ REPOST: Apologies to anyone who has seen this before. It didn't make it onto any of the lists it should have. -J ] Hi Andrew, This series of patches lays the basic ground work for the paravirtualized kernel patches coming later on. I think this lot is ready for the rough-and-tumble world of the -mm tree. For the most part, these patches do nothing or very little. The patches should

From: Jeremy Fitzhardinge <jeremy.fitzhardinge at citrix.com> Hi all, This is a revised version of the pvticket lock series. The early part of the series is mostly unchanged: it converts the bulk of the ticket lock code into C and makes the "small" and "large" ticket code common. The only changes are the incorporation of various review comments. The latter part of

From: Jeremy Fitzhardinge <jeremy.fitzhardinge at citrix.com> Hi all, This is a revised version of the pvticket lock series. The early part of the series is mostly unchanged: it converts the bulk of the ticket lock code into C and makes the "small" and "large" ticket code common. The only changes are the incorporation of various review comments. The latter part of

From: Jeremy Fitzhardinge <jeremy.fitzhardinge at citrix.com> Hi all, This is a revised version of the pvticket lock series. The early part of the series is mostly unchanged: it converts the bulk of the ticket lock code into C and makes the "small" and "large" ticket code common. The only changes are the incorporation of various review comments. The latter part of

From: Jeremy Fitzhardinge <jeremy.fitzhardinge at citrix.com> Hi all, This series does two major things: 1. It converts the bulk of the implementation to C, and makes the "small ticket" and "large ticket" code common. Only the actual size-dependent asm instructions are specific to the ticket size. The resulting generated asm is very similar to the current

From: Jeremy Fitzhardinge <jeremy.fitzhardinge at citrix.com> Hi all, This series does two major things: 1. It converts the bulk of the implementation to C, and makes the "small ticket" and "large ticket" code common. Only the actual size-dependent asm instructions are specific to the ticket size. The resulting generated asm is very similar to the current

From: Jeremy Fitzhardinge <jeremy.fitzhardinge at citrix.com> Hi all, This series does two major things: 1. It converts the bulk of the implementation to C, and makes the "small ticket" and "large ticket" code common. Only the actual size-dependent asm instructions are specific to the ticket size. The resulting generated asm is very similar to the current

Unlike full virtualization in which the virtual machine provides the same platform interface as running natively on the hardware, paravirtualization requires modification to the guest operating system to work with the platform interface provided by the hypervisor. Xen was designed with performance in mind. Calls to the hypervisor are minimized, batched if necessary, and non-critical codepaths

Unlike full virtualization in which the virtual machine provides the same platform interface as running natively on the hardware, paravirtualization requires modification to the guest operating system to work with the platform interface provided by the hypervisor. Xen was designed with performance in mind. Calls to the hypervisor are minimized, batched if necessary, and non-critical codepaths

Unlike full virtualization in which the virtual machine provides the same platform interface as running natively on the hardware, paravirtualization requires modification to the guest operating system to work with the platform interface provided by the hypervisor. Xen was designed with performance in mind. Calls to the hypervisor are minimized, batched if necessary, and non-critical codepaths