Displaying 20 results from an estimated 89 matches for "cmpw".
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cmpl
2007 Apr 18
0
[RFC, PATCH 11/24] i386 Vmi segment changes
...e unsigned get_kernel_rpl(void)
+{
+ unsigned cs;
+ __asm__ ("movl %%cs,%0" : "=r"(cs):);
+ return cs & SEGMENT_RPL_MASK;
+}
+#endif
+
+#define COMPARE_SEGMENT_STACK(segment, offset) \
+ pushl %eax; \
+ mov offset+4(%esp), %eax; \
+ andl $~SEGMENT_RPL_MASK, %eax; \
+ cmpw $segment,%ax; \
+ popl %eax;
+
+#define COMPARE_SEGMENT_REG(segment, reg) \
+ pushl %eax; \
+ mov reg, %eax; \
+ andl $~SEGMENT_RPL_MASK, %eax; \
+ cmpw $segment,%ax; \
+ popl %eax;
+
+#endif
Index: linux-2.6.16-rc5/include/asm-i386/mach-default/mach_segment.h
=====================...
2007 Apr 18
0
[RFC, PATCH 11/24] i386 Vmi segment changes
...e unsigned get_kernel_rpl(void)
+{
+ unsigned cs;
+ __asm__ ("movl %%cs,%0" : "=r"(cs):);
+ return cs & SEGMENT_RPL_MASK;
+}
+#endif
+
+#define COMPARE_SEGMENT_STACK(segment, offset) \
+ pushl %eax; \
+ mov offset+4(%esp), %eax; \
+ andl $~SEGMENT_RPL_MASK, %eax; \
+ cmpw $segment,%ax; \
+ popl %eax;
+
+#define COMPARE_SEGMENT_REG(segment, reg) \
+ pushl %eax; \
+ mov reg, %eax; \
+ andl $~SEGMENT_RPL_MASK, %eax; \
+ cmpw $segment,%ax; \
+ popl %eax;
+
+#endif
Index: linux-2.6.16-rc5/include/asm-i386/mach-default/mach_segment.h
=====================...
2008 Jun 27
2
[LLVMdev] Implementing llvm.atomic.cmp.swap.i32 on PowerPC
...dst, i32imm:$label),
"stwcx. $rS, $dst\n\tbne- La${label}_entry\nLa${label}_exit:",
[(PPCstcx GPRC:$rS, xoaddr:$dst, imm:$label)]>;
def CMP_UNRESw : Pseudo<(outs), (ins GPRC:$rA, GPRC:$rB, i32imm:$label),
"cmpw $rA, $rB\n\tbne- La${label}_exit",
[(PPCcmp_unres GPRC:$rA, GPRC:$rB, imm:$label)]>;
}
...and I can't figure out the syntax for that. Any suggestions?
Cheers,
Gary
--
http://gbenson.net/
-------------- next part --------------
Index: lib/Target/PowerPC/...
2017 Mar 25
2
where to swap
...p 1f
> + jmp 2f
> 1:
> + xor %cx, %cx /* Clear EBIOS flag. */
> +2:
>
> can be ignored. His BIOS isn't corrputing CX (which I
> thought). However that part doesn't hurt if it remains.
I think it still has good reason to exist. The test
cmpw $0xaa55, %bx
jne 1f
could cause a jump which could push a non-zero CX to the stack.
(Whatever reason there might be not to get the 0xaa55 signature
but to get non-zero CX.)
I have now updated the Debian bug report:
https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=857597#55
Have a nice day...
2008 Jun 27
0
[LLVMdev] Implementing llvm.atomic.cmp.swap.i32 on PowerPC
On Jun 27, 2008, at 8:27 AM, Gary Benson wrote:
> def CMP_UNRESw : Pseudo<(outs), (ins GPRC:$rA, GPRC:$rB, i32imm:
> $label),
> "cmpw $rA, $rB\n\tbne- La${label}_exit",
> [(PPCcmp_unres GPRC:$rA, GPRC:$rB, imm:
> $label)]>;
> }
>
> ...and I can't figure out the syntax for that. Any suggestions?
Hi Gary,
You have to write custom encoding logic in C++ for this. This should...
2008 Jun 11
0
[LLVMdev] Possible miscompilation?
On 2008-06-11, at 13:16, Gary Benson wrote:
> Duncan Sands wrote:
>
>> Can you please attach IR which can be compiled to an executable
>> (and shows the problem).
>
> I've been generating functions using a builder and then compiling
> them with ExecutionEngine::getPointerToFunction(). Is there some way
> I can get compilable IR from that?
2008 Jun 11
2
[LLVMdev] Possible miscompilation?
Duncan Sands wrote:
> Can you please attach IR which can be compiled
> to an executable (and shows the problem).
I've been generating functions using a builder and then
compiling them with ExecutionEngine::getPointerToFunction().
Is there some way I can get compilable IR from that?
Cheers,
Gary
--
http://gbenson.net/
2012 Aug 10
1
[PATCH 4/4] Support sectors >512
...*/
+ sub $0x1c, %sp /* -28(%bp) == %sp */
+ pushw $0x1e /* -30(%bp) == %sp */
+ movw $0x200, -6(%bp) /* -6(%bp) sector size */
/* Check to see if we have EBIOS */
pushw %dx /* drive number */
@@ -86,6 +92,7 @@ next:
xorb %dh, %dh
stc
int $0x13
+ popw %dx /* restore drive */
jc 1f
cmpw $0xaa55, %bx
jne 1f
@@ -97,22 +104,32 @@ next:
movl $0xeb42b4+((read_common-read_sector_cbios-4) << 24), \
(read_sector_cbios)
-1:
- popw %dx
+ /*
+ * read sector size.
+ * Should not fail but if it does I assume that at least
+ * previous 512 value is not overridden
+ */
+ movb...
2013 Feb 08
6
[PATCH] 4k_sector: Support dynamic sectors in GPT MBR
This patches add support for dynamic sectors to GPT MBR code.
First 3 patches are trick and optimizations to gain some space for the forth
patch.
I have a modified version of SeaBIOS, some code and some script o test it
I'll send on a different mail.
2010 Nov 26
1
[PATCH] new *br: Show handoff data
..._es: call wrstr
.ascii "ES: \0"
LOADE es, dx
pushw %dx
popw %es
call wrhexw
pr_di: call wrstr
.ascii " DI: \0"
LOADE di, dx
pushw %dx
popw %di
call wrhexw
call crlf
/* ES:DI */ /* %es:0(%di) */
movw $4, %cx
call wrhexbses
#ifdef DEBUG_PNP
subw $4, %si
es lodsw
cmpw $0x5024, %ax
jne scn_pnp
es lodsw
cmpw $0x506E, %ax
jne scn_pnp
call wrstr
.ascii " =$PnP\0"
scn_pnp:
call crlf
/* $PnP Scan */
movw $0xf000, %dx
pushw %dx
popw %es
movw $0, %si
movw $0x1000, %cx
/* 0x506E5024 */
movw $0x5024, %dx
movw $0x506E, %bx
ch_pnp: es lodsw
cmpw %...
2007 Apr 18
2
[PATCH 1/3] Paravirtualization: Kernel Ring Cleanups
...ace)
cli # make sure we don't miss an interrupt
# setting need_resched or sigpending
@@ -386,17 +388,14 @@ syscall_badsys:
/* put ESP to the proper location */ \
movl %eax, %esp;
#define UNWIND_ESPFIX_STACK \
- pushl %eax; \
- movl %ss, %eax; \
- /* see if on 16bit stack */ \
- cmpw $__ESPFIX_SS, %ax; \
+ COMPARE_SEGMENT_REG(__ESPFIX_SS, %ss); \
jne 28f; \
- movl $__KERNEL_DS, %edx; \
+ movl $__USER_DS, %edx; \
movl %edx, %ds; \
movl %edx, %es; \
/* switch to 32bit stack */ \
FIXUP_ESPFIX_STACK \
-28: popl %eax;
+28:;
/*
* Build the entry stubs and pointer table...
2007 Apr 18
2
[PATCH 1/3] Paravirtualization: Kernel Ring Cleanups
...ace)
cli # make sure we don't miss an interrupt
# setting need_resched or sigpending
@@ -386,17 +388,14 @@ syscall_badsys:
/* put ESP to the proper location */ \
movl %eax, %esp;
#define UNWIND_ESPFIX_STACK \
- pushl %eax; \
- movl %ss, %eax; \
- /* see if on 16bit stack */ \
- cmpw $__ESPFIX_SS, %ax; \
+ COMPARE_SEGMENT_REG(__ESPFIX_SS, %ss); \
jne 28f; \
- movl $__KERNEL_DS, %edx; \
+ movl $__USER_DS, %edx; \
movl %edx, %ds; \
movl %edx, %es; \
/* switch to 32bit stack */ \
FIXUP_ESPFIX_STACK \
-28: popl %eax;
+28:;
/*
* Build the entry stubs and pointer table...
2013 Feb 14
2
[PATCH] x86/xen: don't assume %ds is usable in xen_iret for 32-bit PVOPS.
...TRY(xen_iret)
> * resuming the code, so we don't have to be worried about
> * being preempted to another CPU.
> */
> - setz XEN_vcpu_info_mask(%eax)
> + setz %ss:XEN_vcpu_info_mask(%eax)
> xen_iret_start_crit:
>
> /* check for unmasked and pending */
> - cmpw $0x0001, XEN_vcpu_info_pending(%eax)
> + cmpw $0x0001, %ss:XEN_vcpu_info_pending(%eax)
>
> /*
> * If there's something pending, mask events again so we can
> @@ -118,7 +118,7 @@ xen_iret_start_crit:
> * touch XEN_vcpu_info_mask.
> */
> jne 1f
> - movb $...
2013 Feb 14
2
[PATCH] x86/xen: don't assume %ds is usable in xen_iret for 32-bit PVOPS.
...TRY(xen_iret)
> * resuming the code, so we don't have to be worried about
> * being preempted to another CPU.
> */
> - setz XEN_vcpu_info_mask(%eax)
> + setz %ss:XEN_vcpu_info_mask(%eax)
> xen_iret_start_crit:
>
> /* check for unmasked and pending */
> - cmpw $0x0001, XEN_vcpu_info_pending(%eax)
> + cmpw $0x0001, %ss:XEN_vcpu_info_pending(%eax)
>
> /*
> * If there's something pending, mask events again so we can
> @@ -118,7 +118,7 @@ xen_iret_start_crit:
> * touch XEN_vcpu_info_mask.
> */
> jne 1f
> - movb $...
2017 Mar 26
0
where to swap
On Sat, Mar 25, 2017 at 09:28:16PM +0100, Thomas Schmitt via Syslinux wrote:
> I think it still has good reason to exist. The test
>
> cmpw $0xaa55, %bx
> jne 1f
>
> could cause a jump which could push a non-zero CX to the stack.
Yes. But that can be fixed by putting the "andw $1, %cx" test before
the "cmpw $0xaa55, %bx" test.
But then if CX is filled with rubbish and carry is set (the first
test) could...
2002 Feb 26
0
DDE problems
...(bp=a5ae)
9 0x03af:0x38e8 (bp=a5cc)
10 0x03af:0x3617 (bp=a5f0)
11 0x03af:0x150a (bp=a618)
12 0x033f:0x1dec (bp=a640, far call assumed)
13 0x033f:0x1f1f (bp=a668)
14 0x028f:0x0c86 (bp=a904)
15 0x0287:0x00e0 (bp=0000)
0x400a47d6 (GlobalLock+0x1a [global.c:1090] in libntdll.so): cmpw
$0x5342,0xfffffffe(%eax)
1090 if(pintern->Magic==MAGIC_GLOBAL_USED)
Wine-dbg>First chance exception: page fault on read access to 0xc032090d in
32-bit code (0x400a47d6).
Register dump:
CS:0023 SS:002b DS:002b ES:002b FS:0277 GS:0000
EIP:400a47d6 ESP:40ca69ac EBP:40ca69b0 EFLAGS:00010...
2007 Apr 18
1
[PATCH 2/2] Transparent privilege levels in entry.S
...x
+ jb resume_kernel
ENTRY(resume_userspace)
CLI # make sure we don't miss an interrupt
# setting need_resched or sigpending
@@ -399,10 +400,11 @@ syscall_badsys:
#define UNWIND_ESPFIX_STACK \
pushl %eax; \
movl %ss, %eax; \
+ MASK_RPL(%ax); \
/* see if on 16bit stack */ \
cmpw $__ESPFIX_SS, %ax; \
jne 28f; \
- movl $__KERNEL_DS, %edx; \
+ movl $__USER_DS, %edx; \
movl %edx, %ds; \
movl %edx, %es; \
/* switch to 32bit stack */ \
@@ -500,7 +502,7 @@ ENTRY(simd_coprocessor_error)
ENTRY(device_not_available)
pushl $-1 # mark this as an int
SAVE_ALL
- movl %cr0...
2007 Apr 18
1
[PATCH 2/2] Transparent privilege levels in entry.S
...x
+ jb resume_kernel
ENTRY(resume_userspace)
CLI # make sure we don't miss an interrupt
# setting need_resched or sigpending
@@ -399,10 +400,11 @@ syscall_badsys:
#define UNWIND_ESPFIX_STACK \
pushl %eax; \
movl %ss, %eax; \
+ MASK_RPL(%ax); \
/* see if on 16bit stack */ \
cmpw $__ESPFIX_SS, %ax; \
jne 28f; \
- movl $__KERNEL_DS, %edx; \
+ movl $__USER_DS, %edx; \
movl %edx, %ds; \
movl %edx, %es; \
/* switch to 32bit stack */ \
@@ -500,7 +502,7 @@ ENTRY(simd_coprocessor_error)
ENTRY(device_not_available)
pushl $-1 # mark this as an int
SAVE_ALL
- movl %cr0...
2008 Jun 30
2
[LLVMdev] Implementing llvm.atomic.cmp.swap.i32 on PowerPC
Chris Lattner wrote:
> On Jun 27, 2008, at 8:27 AM, Gary Benson wrote:
> > def CMP_UNRESw : Pseudo<(outs), (ins GPRC:$rA, GPRC:$rB, i32imm:
> > $label),
> > "cmpw $rA, $rB\n\tbne- La${label}_exit",
> > [(PPCcmp_unres GPRC:$rA, GPRC:$rB, imm:
> > $label)]>;
> > }
> >
> > ...and I can't figure out the syntax for that. Any suggestions?
>
> You have to write custom encoding logic in C+...
2008 Jun 12
4
[LLVMdev] Possible miscompilation?
...bl print_value
2656: ori 4, 21, 7712
2657: li 3, 634
2658: bl trace_bytecode
2659: lis 3, 4031
2660: lwz 3, -12952(3)
2661: cmplwi 0, 3, 1
2662: beq 0, BB10_218 # do_safepoint
2663: BB10_41: # safepointed
2664: cmpw 0, 27, 26
2665: bge 0, BB10_169 # bci_637
2666: BB10_42: # bci_132
2667: lis 21, 3984
2668: ori 4, 21, 6756
2669: li 3, 132
2670: bl trace_bytecode
2671: ori 4, 21, 6556
2672: li 3, 133
2673: bl trace_bytecode...