Displaying 3 results from an estimated 3 matches for "cmpval".
2008 Apr 21
0
hang when starting X
..._REG ]
(II) NOUVEAU(0): Write: Reg: 0x00004044, Data: 0x2000001C
(II) NOUVEAU(0): 0xE2C1: [ (0x7A) - INIT_ZM_REG ]
(II) NOUVEAU(0): Write: Reg: 0x00100360, Data: 0x8B303A98
(II) NOUVEAU(0): 0xE2CA: [ (0x75) - INIT_CONDITION ]
(II) NOUVEAU(0): 0xE2CA: Cond: 0x00, Reg: 0x00101000, Mask: 0x00000040, Cmpval: 0x00000040
(II) NOUVEAU(0): Read: Reg: 0x00101000, Data: 0xA34EF897
(II) NOUVEAU(0): 0xE2CA: Checking if 0x00000000 equals 0x00000040
(II) NOUVEAU(0): 0xE2CA: CONDITION IS NOT FULFILLED
(II) NOUVEAU(0): 0xE2CA: ------ SKIPPING FOLLOWING COMMANDS ------
(II) NOUVEAU(0): 0xE2CC: [ (0x62) - INIT_Z...
2018 Jun 13
12
RFC: Atomic LL/SC loops in LLVM revisited
...se pseudo-instructions are modelled as in ARM and
AArch64, by specifying multiple outputs and specifying an @earlyclobber
constraint to ensure the register allocator assigns unique registers. e.g.:
class PseudoCmpXchg
: Pseudo<(outs GPR:$res, GPR:$scratch),
(ins GPR:$addr, GPR:$cmpval, GPR:$newval, i32imm:$ordering), []> {
let Constraints = "@earlyclobber $res, at earlyclobber $scratch";
let mayLoad = 1;
let mayStore = 1;
let hasSideEffects = 0;
}
Note that there are additional complications with cmpxchg such as supporting
weak cmpxchg (which requires retur...
2008 Apr 04
1
Driver Problem with 7150M
..._REG ]
(II) NOUVEAU(0): Write: Reg: 0x00004020, Data: 0xE000001C
(II) NOUVEAU(0): 0xE3D5: [ (0x7A) - INIT_ZM_REG ]
(II) NOUVEAU(0): Write: Reg: 0x00680510, Data: 0x01F0001F
(II) NOUVEAU(0): 0xE3DE: [ (0x75) - INIT_CONDITION ]
(II) NOUVEAU(0): 0xE3DE: Cond: 0x00, Reg: 0x00101000, Mask: 0x00000040,
Cmpval: 0x00000040
(II) NOUVEAU(0): Read: Reg: 0x00101000, Data: 0x814F0000
(II) NOUVEAU(0): 0xE3DE: Checking if 0x00000000 equals 0x00000040
(II) NOUVEAU(0): 0xE3DE: CONDITION IS NOT FULFILLED
(II) NOUVEAU(0): 0xE3DE: ------ SKIPPING FOLLOWING COMMANDS ------
(II) NOUVEAU(0): 0xE3E0: [ (0x62) - INIT_Z...