search for: cmpltu

Displaying 3 results from an estimated 3 matches for "cmpltu".

2008 Sep 08
6
[LLVMdev] adde/addc
...arget doesn't support 64 bit arithmetic, so I'd like to supply definitions for adde/addc. The problem is I can't seem to figure out the magic. Here's an example of what I need to generate: # two i64s in r5/r6 and r7/r8 # result in r1/r2, carry in r3 # adde add r2, r6, r8 cmpltu r3, r2, r6 # compute carry # addc add r1, r5, r7 add r1, zero, r3 Is this possible given the current code generation stuff? Is there another approach that I should consider? -Rich
2008 Sep 08
0
[LLVMdev] adde/addc
...o I'd like to supply > definitions for adde/addc. The problem is I can't seem to figure out > the > magic. Here's an example of what I need to generate: > > # two i64s in r5/r6 and r7/r8 > # result in r1/r2, carry in r3 > > # adde > add r2, r6, r8 > cmpltu r3, r2, r6 # compute carry > > # addc > add r1, r5, r7 > add r1, zero, r3 > > Is this possible given the current code generation stuff? Is there > another approach that I should consider? > > -Rich > > _______________________________________________ > LLV...
2008 Sep 08
0
[LLVMdev] adde/addc
..., so I'd like to supply > definitions for adde/addc. The problem is I can't seem to figure out the > magic. Here's an example of what I need to generate: > > # two i64s in r5/r6 and r7/r8 > # result in r1/r2, carry in r3 > > # adde > add r2, r6, r8 > cmpltu r3, r2, r6 # compute carry > > # addc > add r1, r5, r7 > add r1, zero, r3 > > Is this possible given the current code generation stuff? Is there > another approach that I should consider? > > -Rich > > _______________________________________________ >...