Displaying 7 results from an estimated 7 matches for "cmpinstruction".
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2015 May 09
5
[PATCH 1/4] nvc0/ir: avoid jumping to a sched instruction
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
---
Pretty sure there's nothing wrong with it, but it looks odd in the code.
src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp | 2 ++
src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp | 7 +++++--
src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp | 2 ++
3 files changed, 9 insertions(+), 2 deletions(-)
2015 May 09
2
[PATCH 3/4] nvc0/ir: optimize set & 1.0 to produce boolean-float sets
...lium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
> @@ -973,6 +973,35 @@ ConstantFolding::opnd(Instruction *i, ImmediateValue &imm0, int s)
> }
> break;
>
> + case OP_AND:
> + {
> + CmpInstruction *cmp = i->getSrc(t)->getInsn()->asCmp();
> + if (!cmp || cmp->op == OP_SLCT)
how about if (cmp == NULL || ...) and kill the same condition later?
> + return;
> + if (!prog->getTarget()->isOpSupported(cmp->op, TYPE_F32))
> + return;
> +...
2014 May 06
1
[PATCH] nv50/ir/gk110: fix set with f32 dest
...gen/nv50_ir_emit_gk110.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
index 5992c54..b8d0d3e 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
@@ -915,6 +915,9 @@ CodeEmitterGK110::emitSET(const CmpInstruction *i)
modNegAbsF32_3b(i, 1);
}
FTZ_(3a);
+
+ if (i->dType == TYPE_F32)
+ code[1] |= 1 << 23;
}
if (i->sType == TYPE_S32)
code[1] |= 1 << 19;
--
1.8.3.2
2015 Aug 19
5
[PATCH 1/2] nvc0/ir: detect AND/SHR pairs and convert into EXTBF
..._ir_peephole.cpp
index 3841c33..b0e74f0 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
@@ -1023,27 +1023,53 @@ ConstantFolding::opnd(Instruction *i, ImmediateValue &imm0, int s)
case OP_AND:
{
- CmpInstruction *cmp = i->getSrc(t)->getInsn()->asCmp();
- if (!cmp || cmp->op == OP_SLCT || cmp->getDef(0)->refCount() > 1)
- return;
- if (!prog->getTarget()->isOpSupported(cmp->op, TYPE_F32))
- return;
- if (imm0.reg.data.f32 != 1.0)
- return;...
2008 Apr 16
0
[LLVMdev] PATCH: Use size reduction -- wave2
On Apr 16, 2008, at 2:50 AM, heisenbug wrote:
>
> And now here is my educated speculation:
> There are 2 things that became slower
> 1) Use::getUser()
> 2) Use::get/set due to tagging.
>
> The former is seldom called:
>
> $ find lib -name "*.cpp" | xargs grep "getUser(" | wc -l
> 41
The majority of those aren't actually Use::getUser, but
2019 Oct 14
1
[PATCH] gm107/ir: fix loading z offset for layered 3d image bindings
...32, pred->getDef(0),
+ TYPE_U32, bld.loadImm(NULL, blockwidth / 8),
+ loadSuInfo32(ind, slot, NVC0_SU_INFO_BSIZE, su->tex.bindless),
+ pred->getDef(0));
+ }
+ }
- // prevent read fault when the image is not actually bound
- CmpInstruction *pred =
- bld.mkCmp(OP_SET, CC_EQ, TYPE_U32, bld.getSSA(1, FILE_PREDICATE),
- TYPE_U32, bld.mkImm(0),
- loadSuInfo32(ind, slot, NVC0_SU_INFO_ADDR, su->tex.bindless));
- if (su->op != OP_SUSTP && su->tex.format) {
- const TexInstruction::Img...
2008 Apr 16
5
[LLVMdev] PATCH: Use size reduction -- wave2
On Apr 16, 2:13 am, Dan Gohman <goh... at apple.com> wrote:
> Hi Gabor,
>
> Can you provide performance data for this? I'd
> like to know what affect these changes have on
> compile time.
Hi Dan,
Unfortunately, no. I can feed you with some speculation, though,
see below.
The reason why I cannot do measurements (at the moment) is that
- I have no experience with