Displaying 3 results from an estimated 3 matches for "cmpimm".
Did you mean:
cmpi
2016 Dec 22
2
struct bitfield regression between 3.6 and 3.9 (using -O0)
...n we compile in LLVM 3.6 it passes. (this is only an issue with -O0,
higher levels of optimization work fine)
After some investigation we discovered the problem, here's the relevant
part of our assembly generated by LVM 3.9:
load r0, r510, 24, 8
slr r0, r0, 1, 8
cmpimm r0, r0, 1, 0, 8, SNE
bitop1 r0, r0, 1<<0, AND, 64
jct .LBB0_2, r0, 0, N
jrel .LBB0_1
Notice the slr (shift logical right) instruction there is shifting to the
right 1 position in order to get flags.foo into bit 0 of r0. But the
problem is that the...
2016 Dec 22
0
struct bitfield regression between 3.6 and 3.9 (using -O0)
...s is only an issue
> with -O0, higher levels of optimization work fine)
>
> After some investigation we discovered the problem, here's the
> relevant part of our assembly generated by LVM 3.9:
>
> load r0, r510, 24, 8
> slr r0, r0, 1, 8
> cmpimm r0, r0, 1, 0, 8, SNE
> bitop1 r0, r0, 1<<0, AND, 64
> jct .LBB0_2, r0, 0, N
> jrel .LBB0_1
>
> Notice the slr (shift logical right) instruction there is shifting to
> the right 1 position in order to get flags.foo into bit 0 of r0....
2016 Dec 23
2
struct bitfield regression between 3.6 and 3.9 (using -O0)
...his is only an issue with -O0,
> higher levels of optimization work fine)
>
> After some investigation we discovered the problem, here's the relevant
> part of our assembly generated by LVM 3.9:
>
> load r0, r510, 24, 8
> slr r0, r0, 1, 8
> cmpimm r0, r0, 1, 0, 8, SNE
> bitop1 r0, r0, 1<<0, AND, 64
> jct .LBB0_2, r0, 0, N
> jrel .LBB0_1
>
> Notice the slr (shift logical right) instruction there is shifting to the
> right 1 position in order to get flags.foo into bit 0 of r0....