search for: cmpfaaaa

Displaying 3 results from an estimated 3 matches for "cmpfaaaa".

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2005 Dec 13
2
[LLVMdev] The live interval of write-only registers
2005/12/13, Chris Lattner <sabre at nondot.org>: > > For example, this a code snippet for the file generated by the TableGen tool: > ... > > Somewhere in my code, I have to write: > > unsigned opcode = MI->getOpcode(); // MachineInstr* > > if (CMPfaaaa == opcode || > > CMPfaaar == opcode || > > CMPfaara == opcode || > > ... > > Where do you have to write this code? > > -Chris Some machine idioms and instruction combining passes. -- Tzu-Chien Chiu - XGI Technology, Inc. URL: http://www.csie.nctu.edu.t...
2005 Dec 13
3
[LLVMdev] The live interval of write-only registers
...nconvenient in the code generator to manipulate the opcodes because TableGen generates an 'opcode' for each of the templates of an operation. For example, this a code snippet for the file generated by the TableGen tool: namespace llvm { namespace Nrw { enum { PHI, // 0 ... CMPfaaaa, // 16 CMPfaaar, // 17 CMPfaara, // 18 CMPfaarr, // 19 CMPfaraa, // 20 CMPfarar, // 21 CMPfarra, // 22 CMPfarrr, // 23 CMPfraaa, // 24 CMPfraar, // 25 CMPfrara, // 26 CMPfrarr, // 27 CMPfrraa, // 28 CMPfrrar, // 29 CMPfrrra, //...
2005 Dec 13
0
[LLVMdev] The live interval of write-only registers
...tes an 'opcode' for each of the templates of an > operation. Yes, this is a lot. :( > For example, this a code snippet for the file generated by the TableGen tool: ... > Somewhere in my code, I have to write: > unsigned opcode = MI->getOpcode(); // MachineInstr* > if (CMPfaaaa == opcode || > CMPfaaar == opcode || > CMPfaara == opcode || > ... Where do you have to write this code? -Chris -- http://nondot.org/sabre/ http://llvm.org/